Search

Sahana S. Kaup

Examiner (ID: 7980, Phone: (571)272-6897 , Office: P/1639 )

Most Active Art Unit
1639
Art Unit(s)
1675, 1639, 1612, 1684
Total Applications
558
Issued Applications
223
Pending Applications
64
Abandoned Applications
281

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13695373 [patent_doc_number] => 20170358641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/617025 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617025 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/617025
Display device Jun 7, 2017 Issued
Array ( [id] => 13187895 [patent_doc_number] => 10109474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-23 [patent_title] => Method for fabricating handling wafer [patent_app_type] => utility [patent_app_number] => 15/603046 [patent_app_country] => US [patent_app_date] => 2017-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3311 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15603046 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/603046
Method for fabricating handling wafer May 22, 2017 Issued
Array ( [id] => 13543153 [patent_doc_number] => 20180323123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => THIOUREA ORGANIC COMPOUND FOR GALLIUM ARSENIDE BASED OPTOELECTRONICS SURFACE PASSIVATION [patent_app_type] => utility [patent_app_number] => 15/586356 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15586356 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/586356
Thiourea organic compound for gallium arsenide based optoelectronics surface passivation May 3, 2017 Issued
Array ( [id] => 12141032 [patent_doc_number] => 20180019115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/586291 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4940 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15586291 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/586291
Semiconductor substrate and manufacturing method thereof May 3, 2017 Issued
Array ( [id] => 13951033 [patent_doc_number] => 10211297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Semiconductor heterostructures and methods for forming same [patent_app_type] => utility [patent_app_number] => 15/586075 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 4921 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15586075 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/586075
Semiconductor heterostructures and methods for forming same May 2, 2017 Issued
Array ( [id] => 11760294 [patent_doc_number] => 20170207163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 15/474417 [patent_app_country] => US [patent_app_date] => 2017-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15474417 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/474417
Semiconductor device and manufacturing method of the same Mar 29, 2017 Issued
Array ( [id] => 12896860 [patent_doc_number] => 20180190795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => Array Substrate, Manufacturing Method Thereof, and Display Device [patent_app_type] => utility [patent_app_number] => 15/560374 [patent_app_country] => US [patent_app_date] => 2017-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15560374 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/560374
Array Substrate, Manufacturing Method Thereof, and Display Device Mar 26, 2017 Abandoned
Array ( [id] => 13452321 [patent_doc_number] => 20180277703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => CONDUCTIVE ISOLATION BETWEEN PHOTOTRANSISTORS [patent_app_type] => utility [patent_app_number] => 15/467478 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15467478 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/467478
Conductive isolation between phototransistors Mar 22, 2017 Issued
Array ( [id] => 12573996 [patent_doc_number] => 10020259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-10 [patent_title] => Copper etching integration scheme [patent_app_type] => utility [patent_app_number] => 15/463617 [patent_app_country] => US [patent_app_date] => 2017-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 2843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15463617 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/463617
Copper etching integration scheme Mar 19, 2017 Issued
Array ( [id] => 11732994 [patent_doc_number] => 20170194437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'GROWTH OF SEMICONDUCTORS ON HETERO-SUBSTRATES USING GRAPHENE AS AN INTERFACIAL LAYER' [patent_app_type] => utility [patent_app_number] => 15/463804 [patent_app_country] => US [patent_app_date] => 2017-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3553 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15463804 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/463804
Growth of semiconductors on hetero-substrates using graphene as an interfacial layer Mar 19, 2017 Issued
Array ( [id] => 14268315 [patent_doc_number] => 10283730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => OLED encapsulation method and OLED encapsulation structure [patent_app_type] => utility [patent_app_number] => 15/514530 [patent_app_country] => US [patent_app_date] => 2017-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6210 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15514530 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/514530
OLED encapsulation method and OLED encapsulation structure Mar 15, 2017 Issued
Array ( [id] => 14164433 [patent_doc_number] => 20190109319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => METHOD FOR THE FABRICATION OF INDIUM-GALLIUM NITRIDE ELECTRODES FOR ELECTROCHEMICAL DEVICES [patent_app_type] => utility [patent_app_number] => 16/085731 [patent_app_country] => US [patent_app_date] => 2017-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16085731 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/085731
Method for the fabrication of indium-gallium nitride electrodes for electrochemical devices Mar 13, 2017 Issued
Array ( [id] => 14769381 [patent_doc_number] => 10396092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Vertical memory device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/455778 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 15093 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455778 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455778
Vertical memory device and method of manufacturing the same Mar 9, 2017 Issued
Array ( [id] => 11974768 [patent_doc_number] => 20170278922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'HIGH VOLTAGE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/455798 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4287 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455798 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455798
High voltage semiconductor device Mar 9, 2017 Issued
Array ( [id] => 13420433 [patent_doc_number] => 20180261759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => BOTTOM ELECTRODE FOR MRAM APPLICATIONS [patent_app_type] => utility [patent_app_number] => 15/455754 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455754 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455754
Bottom electrode for MRAM applications Mar 9, 2017 Issued
Array ( [id] => 12109235 [patent_doc_number] => 09865724 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-09 [patent_title] => 'Nitride semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/455918 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5263 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455918 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455918
Nitride semiconductor device Mar 9, 2017 Issued
Array ( [id] => 12990214 [patent_doc_number] => 20170345814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/455695 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455695 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455695
Semiconductor device Mar 9, 2017 Issued
Array ( [id] => 13420109 [patent_doc_number] => 20180261597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => LOW RESISTANCE SOURCE/DRAIN CONTACTS FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICES [patent_app_type] => utility [patent_app_number] => 15/455659 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455659 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455659
Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices Mar 9, 2017 Issued
Array ( [id] => 16172954 [patent_doc_number] => 10714533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Substrate free LED package [patent_app_type] => utility [patent_app_number] => 15/453856 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 8583 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15453856 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/453856
Substrate free LED package Mar 7, 2017 Issued
Array ( [id] => 12236847 [patent_doc_number] => 20180069710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'SECURE CHIPS WITH SERIAL NUMBERS' [patent_app_type] => utility [patent_app_number] => 15/444396 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 15199 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15444396 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/444396
Secure chips with serial numbers Feb 27, 2017 Issued
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