Search

Sahera Halim

Examiner (ID: 8860, Phone: (571)272-4003 , Office: P/2457 )

Most Active Art Unit
2457
Art Unit(s)
2157, 2457
Total Applications
317
Issued Applications
235
Pending Applications
15
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19038294 [patent_doc_number] => 20240088109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/171988 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171988 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/171988
SEMICONDUCTOR DEVICE Feb 20, 2023 Pending
Array ( [id] => 20638038 [patent_doc_number] => 12598937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Epitaxial formation with treatment and semiconductor devices resulting therefrom [patent_app_type] => utility [patent_app_number] => 18/171508 [patent_app_country] => US [patent_app_date] => 2023-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 75 [patent_no_of_words] => 11302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171508 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/171508
Epitaxial formation with treatment and semiconductor devices resulting therefrom Feb 19, 2023 Issued
Array ( [id] => 19071391 [patent_doc_number] => 20240105817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/170411 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170411 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/170411
Silicon layer-based silicide contacts Feb 15, 2023 Issued
Array ( [id] => 19101110 [patent_doc_number] => 20240120338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/110330 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110330 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110330
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME Feb 14, 2023 Pending
Array ( [id] => 18440293 [patent_doc_number] => 20230187588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => LED PACKAGE FOR UV LIGHT AND PROCESS [patent_app_type] => utility [patent_app_number] => 18/164390 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164390 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/164390
LED PACKAGE FOR UV LIGHT AND PROCESS Feb 2, 2023 Pending
Array ( [id] => 19364392 [patent_doc_number] => 20240266426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Semiconductor Structure for Improved Radio Frequency Thermal Management [patent_app_type] => utility [patent_app_number] => 18/164249 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/164249
Semiconductor Structure for Improved Radio Frequency Thermal Management Feb 2, 2023 Pending
Array ( [id] => 20612629 [patent_doc_number] => 12588245 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Method for manufacturing for forming source/drain contact features and devices manufactured thereof [patent_app_type] => utility [patent_app_number] => 18/104836 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 4357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18104836 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/104836
Method for manufacturing for forming source/drain contact features and devices manufactured thereof Feb 1, 2023 Issued
Array ( [id] => 20625964 [patent_doc_number] => 12593489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Semiconductor structure including gate spacer layer and dielectric layer having portion lower than top surface of gate spacer layer [patent_app_type] => utility [patent_app_number] => 18/163785 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 77 [patent_no_of_words] => 8063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163785 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163785
Semiconductor structure including gate spacer layer and dielectric layer having portion lower than top surface of gate spacer layer Feb 1, 2023 Issued
Array ( [id] => 19349213 [patent_doc_number] => 20240258177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => METHODS FOR CORRECTING WARPAGE WITH STRESS FILMS AND PACKAGE STRUCTURES THEREOF [patent_app_type] => utility [patent_app_number] => 18/103846 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18103846 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/103846
METHODS FOR CORRECTING WARPAGE WITH STRESS FILMS AND PACKAGE STRUCTURES THEREOF Jan 30, 2023 Pending
Array ( [id] => 18410667 [patent_doc_number] => 20230172020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => DISPLAY DEVICE INCLUDING A FLEXIBLE SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/158750 [patent_app_country] => US [patent_app_date] => 2023-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158750 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/158750
Display device including a flexible substrate Jan 23, 2023 Issued
Array ( [id] => 19071296 [patent_doc_number] => 20240105722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/099806 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/099806
SEMICONDUCTOR DEVICE Jan 19, 2023 Pending
Array ( [id] => 20705688 [patent_doc_number] => 12628415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Post-replacement metal gate (RMG) gate cut for performance enhanced FinFET [patent_app_type] => utility [patent_app_number] => 18/098633 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 28 [patent_no_of_words] => 7318 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18098633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/098633
Post-replacement metal gate (RMG) gate cut for performance enhanced FinFET Jan 17, 2023 Issued
Array ( [id] => 18379886 [patent_doc_number] => 20230154975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => PIN DIODE INCLUDING A CONDUCTIVE LAYER, AND FABRICATION PROCESS [patent_app_type] => utility [patent_app_number] => 18/096791 [patent_app_country] => US [patent_app_date] => 2023-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18096791 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/096791
PIN DIODE INCLUDING A CONDUCTIVE LAYER, AND FABRICATION PROCESS Jan 12, 2023 Abandoned
Array ( [id] => 18365787 [patent_doc_number] => 20230147378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/093861 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18093861 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/093861
Display apparatus and method of manufacturing the same Jan 5, 2023 Issued
Array ( [id] => 19007696 [patent_doc_number] => 20240071767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => Volume-less Fluorine Incorporation Method [patent_app_type] => utility [patent_app_number] => 18/150861 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8371 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150861 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150861
Volume-less Fluorine Incorporation Method Jan 5, 2023 Pending
Array ( [id] => 20361823 [patent_doc_number] => 12477842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Optical sensor device [patent_app_type] => utility [patent_app_number] => 18/148056 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2204 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18148056 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/148056
Optical sensor device Dec 28, 2022 Issued
Array ( [id] => 20734524 [patent_doc_number] => 12641789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Three-dimensional NAND memory device and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/090872 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 3310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090872
Three-dimensional NAND memory device and method of forming the same Dec 28, 2022 Issued
Array ( [id] => 19269481 [patent_doc_number] => 20240213185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SYSTEM, ELECTRONIC DEVICE AND PACKAGE WITH VERTICAL TO HORIZONTAL SUBSTRATE INTEGRATED WAVEGUIDE TRANSITION AND HORIZONTAL GROUNDED COPLANAR WAVEGUIDE TRANSITION [patent_app_type] => utility [patent_app_number] => 18/146886 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146886 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146886
System, electronic device and package with vertical to horizontal substrate integrated waveguide transition and horizontal grounded coplanar waveguide transition Dec 26, 2022 Issued
Array ( [id] => 19253112 [patent_doc_number] => 20240204109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => COMPLEMENTARY FIELD EFFECT TRANSISTOR (CFET) WITH BALANCED N AND P DRIVE CURRENT [patent_app_type] => utility [patent_app_number] => 18/068992 [patent_app_country] => US [patent_app_date] => 2022-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6613 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18068992 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/068992
Complementary field effect transistor (CFET) with balanced N and P drive current Dec 19, 2022 Issued
Array ( [id] => 18951137 [patent_doc_number] => 11894444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Secure chip identification using random threshold voltage variation in a field effect transistor structure as a physically unclonable function [patent_app_type] => utility [patent_app_number] => 18/062488 [patent_app_country] => US [patent_app_date] => 2022-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5750 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18062488 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/062488
Secure chip identification using random threshold voltage variation in a field effect transistor structure as a physically unclonable function Dec 5, 2022 Issued
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