Search

Saleh Najjar

Supervisory Patent Examiner (ID: 11375, Phone: (571)272-4006 , Office: P/2492 )

Most Active Art Unit
2157
Art Unit(s)
2315, 2155, 2784, 2157, 2154, 2492, 2758
Total Applications
519
Issued Applications
365
Pending Applications
52
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6143578 [patent_doc_number] => 20020002668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'PROGRAM EXECUTION METHOD FOR SPECIFIC CASE PROCESSING AND APPARATUS USING THE SAME' [patent_app_type] => new [patent_app_number] => 08/784753 [patent_app_country] => US [patent_app_date] => 1997-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4984 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20020002668.pdf [firstpage_image] =>[orig_patent_app_number] => 08784753 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/784753
PROGRAM EXECUTION METHOD FOR SPECIFIC CASE PROCESSING AND APPARATUS USING THE SAME Jan 15, 1997 Abandoned
Array ( [id] => 4251911 [patent_doc_number] => 06076107 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Method for reducing SNMP instrumentation message flows' [patent_app_type] => 1 [patent_app_number] => 8/781224 [patent_app_country] => US [patent_app_date] => 1997-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4628 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/076/06076107.pdf [firstpage_image] =>[orig_patent_app_number] => 781224 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/781224
Method for reducing SNMP instrumentation message flows Jan 9, 1997 Issued
Array ( [id] => 4036434 [patent_doc_number] => 05968133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Enhanced security network time synchronization device and method' [patent_app_type] => 1 [patent_app_number] => 8/782887 [patent_app_country] => US [patent_app_date] => 1997-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3590 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/968/05968133.pdf [firstpage_image] =>[orig_patent_app_number] => 782887 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/782887
Enhanced security network time synchronization device and method Jan 9, 1997 Issued
Array ( [id] => 4148818 [patent_doc_number] => 06016540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method and apparatus for scheduling instructions in waves' [patent_app_type] => 1 [patent_app_number] => 8/780249 [patent_app_country] => US [patent_app_date] => 1997-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5689 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016540.pdf [firstpage_image] =>[orig_patent_app_number] => 780249 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/780249
Method and apparatus for scheduling instructions in waves Jan 7, 1997 Issued
Array ( [id] => 4008392 [patent_doc_number] => 05892944 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Program execution and operation right management system suitable for single virtual memory scheme' [patent_app_type] => 1 [patent_app_number] => 8/779118 [patent_app_country] => US [patent_app_date] => 1997-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 15640 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892944.pdf [firstpage_image] =>[orig_patent_app_number] => 779118 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/779118
Program execution and operation right management system suitable for single virtual memory scheme Jan 5, 1997 Issued
Array ( [id] => 3901296 [patent_doc_number] => 05715439 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Bi-directional co-processor interface' [patent_app_type] => 1 [patent_app_number] => 8/762650 [patent_app_country] => US [patent_app_date] => 1996-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4819 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715439.pdf [firstpage_image] =>[orig_patent_app_number] => 762650 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/762650
Bi-directional co-processor interface Dec 8, 1996 Issued
Array ( [id] => 4126047 [patent_doc_number] => 06058410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Method and apparatus for selecting a rounding mode for a numeric operation' [patent_app_type] => 1 [patent_app_number] => 8/759050 [patent_app_country] => US [patent_app_date] => 1996-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3275 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058410.pdf [firstpage_image] =>[orig_patent_app_number] => 759050 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/759050
Method and apparatus for selecting a rounding mode for a numeric operation Dec 1, 1996 Issued
Array ( [id] => 3898516 [patent_doc_number] => 05748935 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Reconstruction of young bits in annex after mispredicted execution branch in pipelined processor' [patent_app_type] => 1 [patent_app_number] => 8/752950 [patent_app_country] => US [patent_app_date] => 1996-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748935.pdf [firstpage_image] =>[orig_patent_app_number] => 752950 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/752950
Reconstruction of young bits in annex after mispredicted execution branch in pipelined processor Nov 19, 1996 Issued
Array ( [id] => 4008300 [patent_doc_number] => 05920710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Apparatus and method for modifying status bits in a reorder buffer with a large speculative state' [patent_app_type] => 1 [patent_app_number] => 8/751649 [patent_app_country] => US [patent_app_date] => 1996-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 18251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920710.pdf [firstpage_image] =>[orig_patent_app_number] => 751649 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/751649
Apparatus and method for modifying status bits in a reorder buffer with a large speculative state Nov 17, 1996 Issued
Array ( [id] => 4123401 [patent_doc_number] => 06101543 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Pseudo network adapter for frame capture, encapsulation and encryption' [patent_app_type] => 1 [patent_app_number] => 8/738155 [patent_app_country] => US [patent_app_date] => 1996-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 11960 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101543.pdf [firstpage_image] =>[orig_patent_app_number] => 738155 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/738155
Pseudo network adapter for frame capture, encapsulation and encryption Oct 24, 1996 Issued
Array ( [id] => 3972774 [patent_doc_number] => 05978846 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Inter-computer communication system' [patent_app_type] => 1 [patent_app_number] => 8/725953 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 8901 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978846.pdf [firstpage_image] =>[orig_patent_app_number] => 725953 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/725953
Inter-computer communication system Oct 6, 1996 Issued
08/723746 SYSTEM AND METHOD FOR REMOTE OPERATION OF MAINFRAME CONSOLE Sep 29, 1996 Abandoned
Array ( [id] => 3877908 [patent_doc_number] => 05796970 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Information processing apparatus for realizing data transfer for a plurality of registers using instructions of short word length' [patent_app_type] => 1 [patent_app_number] => 8/716946 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 6979 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796970.pdf [firstpage_image] =>[orig_patent_app_number] => 716946 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716946
Information processing apparatus for realizing data transfer for a plurality of registers using instructions of short word length Sep 19, 1996 Issued
Array ( [id] => 3836131 [patent_doc_number] => 05790812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Method of encoding or decoding protocol data units (PDUS)' [patent_app_type] => 1 [patent_app_number] => 8/713853 [patent_app_country] => US [patent_app_date] => 1996-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3504 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790812.pdf [firstpage_image] =>[orig_patent_app_number] => 713853 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/713853
Method of encoding or decoding protocol data units (PDUS) Sep 12, 1996 Issued
Array ( [id] => 3897794 [patent_doc_number] => 05805875 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Vector processing system with multi-operation, run-time configurable pipelines' [patent_app_type] => 1 [patent_app_number] => 8/713748 [patent_app_country] => US [patent_app_date] => 1996-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5678 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805875.pdf [firstpage_image] =>[orig_patent_app_number] => 713748 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/713748
Vector processing system with multi-operation, run-time configurable pipelines Sep 12, 1996 Issued
Array ( [id] => 3818309 [patent_doc_number] => 05854914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Mechanism to improved execution of misaligned loads' [patent_app_type] => 1 [patent_app_number] => 8/711096 [patent_app_country] => US [patent_app_date] => 1996-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4223 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854914.pdf [firstpage_image] =>[orig_patent_app_number] => 711096 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/711096
Mechanism to improved execution of misaligned loads Sep 9, 1996 Issued
Array ( [id] => 3902129 [patent_doc_number] => 05724510 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Method of configuring a valid IP address and detecting duplicate IP addresses in a local area network' [patent_app_type] => 1 [patent_app_number] => 8/709346 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6173 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724510.pdf [firstpage_image] =>[orig_patent_app_number] => 709346 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709346
Method of configuring a valid IP address and detecting duplicate IP addresses in a local area network Sep 5, 1996 Issued
Array ( [id] => 3879352 [patent_doc_number] => 05794056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'System for automatic buffering of commands for DASD units' [patent_app_type] => 1 [patent_app_number] => 8/707095 [patent_app_country] => US [patent_app_date] => 1996-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4799 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794056.pdf [firstpage_image] =>[orig_patent_app_number] => 707095 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/707095
System for automatic buffering of commands for DASD units Sep 2, 1996 Issued
Array ( [id] => 3794296 [patent_doc_number] => 05809276 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'System and method for register renaming' [patent_app_type] => 1 [patent_app_number] => 8/698211 [patent_app_country] => US [patent_app_date] => 1996-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4236 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809276.pdf [firstpage_image] =>[orig_patent_app_number] => 698211 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/698211
System and method for register renaming Aug 14, 1996 Issued
08/685656 METHOD FOR CONCURRENTLY DISPATCHING MICROCODE AND DIRECTLY-DECODED INSTRUCTIONS IN A MICROPROCESSOR Jul 23, 1996 Abandoned
Menu