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Saleh Najjar

Supervisory Patent Examiner (ID: 11375, Phone: (571)272-4006 , Office: P/2492 )

Most Active Art Unit
2157
Art Unit(s)
2315, 2155, 2784, 2157, 2154, 2492, 2758
Total Applications
519
Issued Applications
365
Pending Applications
52
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3997419 [patent_doc_number] => 05862321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'System and method for accessing and distributing electronic documents' [patent_app_type] => 1 [patent_app_number] => 8/493376 [patent_app_country] => US [patent_app_date] => 1995-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6257 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/862/05862321.pdf [firstpage_image] =>[orig_patent_app_number] => 493376 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/493376
System and method for accessing and distributing electronic documents Jun 20, 1995 Issued
Array ( [id] => 3621154 [patent_doc_number] => 05590295 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'System and method for register renaming' [patent_app_type] => 1 [patent_app_number] => 8/478531 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4257 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590295.pdf [firstpage_image] =>[orig_patent_app_number] => 478531 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478531
System and method for register renaming Jun 6, 1995 Issued
08/475416 METHOD FOR EXECUTION OF PROGRAM STEPS BY A REMOTE CPU IN A COMPUTER NETWORK Jun 6, 1995 Abandoned
Array ( [id] => 3616458 [patent_doc_number] => 05579496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Method and apparatus for processing control instructions received from multiple sources connected to a communication bus' [patent_app_type] => 1 [patent_app_number] => 8/483629 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3960 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579496.pdf [firstpage_image] =>[orig_patent_app_number] => 483629 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/483629
Method and apparatus for processing control instructions received from multiple sources connected to a communication bus Jun 6, 1995 Issued
08/483285 MEHTOD AND APPARATUS FOR PERFORMING A STORE OPERATION Jun 6, 1995 Abandoned
Array ( [id] => 1337277 [patent_doc_number] => 06604190 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Data address prediction structure and a method for operating the same' [patent_app_type] => B1 [patent_app_number] => 08/473504 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 69 [patent_no_of_words] => 73077 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/604/06604190.pdf [firstpage_image] =>[orig_patent_app_number] => 08473504 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473504
Data address prediction structure and a method for operating the same Jun 6, 1995 Issued
Array ( [id] => 1595947 [patent_doc_number] => 06484252 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Microprocessor with improved instruction cycle using time-compressed fetching' [patent_app_type] => B1 [patent_app_number] => 08/488082 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3420 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/484/06484252.pdf [firstpage_image] =>[orig_patent_app_number] => 08488082 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/488082
Microprocessor with improved instruction cycle using time-compressed fetching Jun 6, 1995 Issued
Array ( [id] => 3707696 [patent_doc_number] => 05596726 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Method and system for buffering transient data using a single physical buffer' [patent_app_type] => 1 [patent_app_number] => 8/481218 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3825 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596726.pdf [firstpage_image] =>[orig_patent_app_number] => 481218 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/481218
Method and system for buffering transient data using a single physical buffer Jun 6, 1995 Issued
Array ( [id] => 3694241 [patent_doc_number] => 05644310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Integrated audio decoder system and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/475251 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 38 [patent_no_of_words] => 31985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644310.pdf [firstpage_image] =>[orig_patent_app_number] => 475251 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/475251
Integrated audio decoder system and method of operation Jun 6, 1995 Issued
Array ( [id] => 3674242 [patent_doc_number] => 05657454 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Audio decoder circuit and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/477028 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 38 [patent_no_of_words] => 32230 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657454.pdf [firstpage_image] =>[orig_patent_app_number] => 477028 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/477028
Audio decoder circuit and method of operation Jun 6, 1995 Issued
Array ( [id] => 3735889 [patent_doc_number] => 05673408 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Processor structure and method for renamable trap-stack' [patent_app_type] => 1 [patent_app_number] => 8/472394 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 64 [patent_no_of_words] => 52767 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 517 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/673/05673408.pdf [firstpage_image] =>[orig_patent_app_number] => 472394 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472394
Processor structure and method for renamable trap-stack Jun 6, 1995 Issued
08/473514 METHOD AND APPARATUS FOR SORTING INCOMING INTERLEAVED ASYNCHRONOUS TRANSFER MODE CELLS Jun 6, 1995 Abandoned
Array ( [id] => 3564176 [patent_doc_number] => 05572690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Cascaded multistage counterflow pipeline processor for carrying distinct data in two opposite directions' [patent_app_type] => 1 [patent_app_number] => 8/468884 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15726 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572690.pdf [firstpage_image] =>[orig_patent_app_number] => 468884 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/468884
Cascaded multistage counterflow pipeline processor for carrying distinct data in two opposite directions Jun 5, 1995 Issued
Array ( [id] => 3705729 [patent_doc_number] => 05651123 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Program execution control device having addressability in accordance with M series pseudo-random number sequence' [patent_app_type] => 1 [patent_app_number] => 8/460947 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 7351 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/651/05651123.pdf [firstpage_image] =>[orig_patent_app_number] => 460947 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/460947
Program execution control device having addressability in accordance with M series pseudo-random number sequence Jun 4, 1995 Issued
08/456746 PROGRAMMABLE INSTRUCTION TRAP SYSTEM AND METHOD May 31, 1995 Abandoned
08/457049 METHOD AND APPARATUS FOR ROTATING ACTIVE INSTRUCTIONS IN A PARALLEL DATA PROCESSOR May 31, 1995 Abandoned
Array ( [id] => 3807630 [patent_doc_number] => 05842044 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Input buffer device for a printer using an FIFO and data input method' [patent_app_type] => 1 [patent_app_number] => 8/456678 [patent_app_country] => US [patent_app_date] => 1995-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 897 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/842/05842044.pdf [firstpage_image] =>[orig_patent_app_number] => 456678 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/456678
Input buffer device for a printer using an FIFO and data input method May 31, 1995 Issued
Array ( [id] => 3970827 [patent_doc_number] => 05936939 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Digital network including early packet discard mechanism with adjustable threshold' [patent_app_type] => 1 [patent_app_number] => 8/445673 [patent_app_country] => US [patent_app_date] => 1995-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7253 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936939.pdf [firstpage_image] =>[orig_patent_app_number] => 445673 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/445673
Digital network including early packet discard mechanism with adjustable threshold May 21, 1995 Issued
Array ( [id] => 3933479 [patent_doc_number] => 05945994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Kinematic-simulation apparatus and kinematic-simulation method with interference processing' [patent_app_type] => 1 [patent_app_number] => 8/444358 [patent_app_country] => US [patent_app_date] => 1995-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 35 [patent_no_of_words] => 9345 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/945/05945994.pdf [firstpage_image] =>[orig_patent_app_number] => 444358 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/444358
Kinematic-simulation apparatus and kinematic-simulation method with interference processing May 17, 1995 Issued
08/441261 STALLING AN INSTRUCTION PIPELINE DURING INSTRUCTION STREAM REPAIRS IN A PROCESSOR May 14, 1995 Abandoned
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