| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3812358
[patent_doc_number] => 05781795
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Computer system having means for setting keyboard control information at system installation'
[patent_app_type] => 1
[patent_app_number] => 8/436640
[patent_app_country] => US
[patent_app_date] => 1995-05-08
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[pdf_file] => patents/05/781/05781795.pdf
[firstpage_image] =>[orig_patent_app_number] => 436640
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/436640 | Computer system having means for setting keyboard control information at system installation | May 7, 1995 | Issued |
Array
(
[id] => 3808567
[patent_doc_number] => 05727213
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Computer system capable of booting from CD-ROM and tape'
[patent_app_type] => 1
[patent_app_number] => 8/434387
[patent_app_country] => US
[patent_app_date] => 1995-05-03
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/727/05727213.pdf
[firstpage_image] =>[orig_patent_app_number] => 434387
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/434387 | Computer system capable of booting from CD-ROM and tape | May 2, 1995 | Issued |
Array
(
[id] => 3612354
[patent_doc_number] => 05559988
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Method and circuitry for queuing snooping, prioritizing and suspending commands'
[patent_app_type] => 1
[patent_app_number] => 8/408100
[patent_app_country] => US
[patent_app_date] => 1995-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 8401
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559988.pdf
[firstpage_image] =>[orig_patent_app_number] => 408100
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/408100 | Method and circuitry for queuing snooping, prioritizing and suspending commands | Mar 20, 1995 | Issued |
| 08/403547 | METHOD AND APPARATUS FOR GENERATING AN EXTENDED FINITE STATE MACHINE ARCHITECTURE FROM A SOFTWARE SPECIFICATION | Mar 13, 1995 | Abandoned |
Array
(
[id] => 4260301
[patent_doc_number] => 06092183
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-18
[patent_title] => 'Data processor for processing a complex instruction by dividing it into executing units'
[patent_app_type] => 1
[patent_app_number] => 8/401691
[patent_app_country] => US
[patent_app_date] => 1995-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 22
[patent_no_of_words] => 5298
[patent_no_of_claims] => 19
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[patent_words_short_claim] => 101
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/092/06092183.pdf
[firstpage_image] =>[orig_patent_app_number] => 401691
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/401691 | Data processor for processing a complex instruction by dividing it into executing units | Mar 9, 1995 | Issued |
| 08/400511 | STAND-ALONE DATA DRIVEN TYPE INFORMATION PROCESSOR | Mar 6, 1995 | Abandoned |
| 08/398299 | PROCESSOR STRUCTURE AND METHOD FOR TRACKING INSTRUCTION STATUS TO MAINTAIN PRECISE STATE | Mar 2, 1995 | Abandoned |
Array
(
[id] => 3708723
[patent_doc_number] => 05678005
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Cable connect error detection system'
[patent_app_type] => 1
[patent_app_number] => 8/391320
[patent_app_country] => US
[patent_app_date] => 1995-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
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[pdf_file] => patents/05/678/05678005.pdf
[firstpage_image] =>[orig_patent_app_number] => 391320
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/391320 | Cable connect error detection system | Feb 20, 1995 | Issued |
Array
(
[id] => 3744025
[patent_doc_number] => 05636351
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-03
[patent_title] => 'Performance of an operation on whole word operands and on operations in parallel on sub-word operands in a single processor'
[patent_app_type] => 1
[patent_app_number] => 8/390908
[patent_app_country] => US
[patent_app_date] => 1995-02-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/636/05636351.pdf
[firstpage_image] =>[orig_patent_app_number] => 390908
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/390908 | Performance of an operation on whole word operands and on operations in parallel on sub-word operands in a single processor | Feb 16, 1995 | Issued |
Array
(
[id] => 3886874
[patent_doc_number] => 05798645
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-25
[patent_title] => 'Hardware emulations system with delay units'
[patent_app_type] => 1
[patent_app_number] => 8/384391
[patent_app_country] => US
[patent_app_date] => 1995-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 4315
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/798/05798645.pdf
[firstpage_image] =>[orig_patent_app_number] => 384391
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/384391 | Hardware emulations system with delay units | Feb 2, 1995 | Issued |
| 08/378659 | RECONSTRUCTION OF YOUNG BITS IN ANNEX AFTER MISPREDICTED EXECUTION BRANCH IN PIPELINED PROCESSOR | Jan 25, 1995 | Abandoned |
Array
(
[id] => 3566540
[patent_doc_number] => 05519849
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-21
[patent_title] => 'Method of reducing the complexity of an I/O request to a RAID-4 or RAID-5 array'
[patent_app_type] => 1
[patent_app_number] => 8/329046
[patent_app_country] => US
[patent_app_date] => 1994-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 8634
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[pdf_file] => patents/05/519/05519849.pdf
[firstpage_image] =>[orig_patent_app_number] => 329046
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/329046 | Method of reducing the complexity of an I/O request to a RAID-4 or RAID-5 array | Oct 24, 1994 | Issued |
| 08/317425 | METHOD AND APPARATUS FOR MANAGING THE EXECUTION OF INSTRUCTIONS WITH PROMIMATE SUCCESSIVE BRANCHES IN A CACHE-BASED DATA PROCESSING SYSTEM | Oct 3, 1994 | Abandoned |
Array
(
[id] => 3730298
[patent_doc_number] => 05617537
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-01
[patent_title] => 'Message passing system for distributed shared memory multiprocessor system and message passing method using the same'
[patent_app_type] => 1
[patent_app_number] => 8/317647
[patent_app_country] => US
[patent_app_date] => 1994-10-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/617/05617537.pdf
[firstpage_image] =>[orig_patent_app_number] => 317647
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/317647 | Message passing system for distributed shared memory multiprocessor system and message passing method using the same | Oct 2, 1994 | Issued |
| 08/314936 | METHOD AND APPARATUS FOR A BRANCH TARGET BUFFER WITH SHARED BRANCH PATTERN TABLES FOR ASSOCIATED BRANCH PREDICTIONS | Sep 28, 1994 | Abandoned |
Array
(
[id] => 3676679
[patent_doc_number] => 05598546
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-28
[patent_title] => 'Dual-architecture super-scalar pipeline'
[patent_app_type] => 1
[patent_app_number] => 8/298583
[patent_app_country] => US
[patent_app_date] => 1994-08-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/598/05598546.pdf
[firstpage_image] =>[orig_patent_app_number] => 298583
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/298583 | Dual-architecture super-scalar pipeline | Aug 30, 1994 | Issued |
Array
(
[id] => 3759962
[patent_doc_number] => 05717851
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-10
[patent_title] => 'Breakpoint detection circuit in a data processor and method therefor'
[patent_app_type] => 1
[patent_app_number] => 8/290667
[patent_app_country] => US
[patent_app_date] => 1994-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/05/717/05717851.pdf
[firstpage_image] =>[orig_patent_app_number] => 290667
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/290667 | Breakpoint detection circuit in a data processor and method therefor | Aug 14, 1994 | Issued |
| 08/278066 | PROGRAM EXECUTION AND OPERATION RIGHT MANAGEMENT SYSTEM SUITABLE FOR SINGLE VIRTUAL MEMORY SCHEME | Jul 19, 1994 | Abandoned |
| 08/264983 | METHOD AND APPARATUS FOR SERVICING A PLURALITY OF FIFO'S IN A CAPTURE GATE ARRAY | Jun 23, 1994 | Abandoned |
Array
(
[id] => 4254708
[patent_doc_number] => 06119183
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-12
[patent_title] => 'Multi-port switching system and method for a computer bus'
[patent_app_type] => 1
[patent_app_number] => 8/252896
[patent_app_country] => US
[patent_app_date] => 1994-06-02
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[pdf_file] => patents/06/119/06119183.pdf
[firstpage_image] =>[orig_patent_app_number] => 252896
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/252896 | Multi-port switching system and method for a computer bus | Jun 1, 1994 | Issued |