![](/images/general/no_picture/200_user.png)
Salvatore A Cangialosi
Examiner (ID: 11118)
Most Active Art Unit | 2202 |
Art Unit(s) | 2304, 2746, 3305, 2766, 3642, 2661, 2200, 2201, 2202, 2732, 3402, 3621, 2899 |
Total Applications | 2208 |
Issued Applications | 1964 |
Pending Applications | 90 |
Abandoned Applications | 154 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7417900
[patent_doc_number] => 20040177195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-09
[patent_title] => 'Virtual SCSI enclosure services'
[patent_app_type] => new
[patent_app_number] => 10/371000
[patent_app_country] => US
[patent_app_date] => 2003-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3055
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0177/20040177195.pdf
[firstpage_image] =>[orig_patent_app_number] => 10371000
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/371000 | Virtual SCSI enclosure services | Feb 19, 2003 | Abandoned |
Array
(
[id] => 7417796
[patent_doc_number] => 20040177187
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-09
[patent_title] => 'System and method for arbitrating access on a bus'
[patent_app_type] => new
[patent_app_number] => 10/370004
[patent_app_country] => US
[patent_app_date] => 2003-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4696
[patent_no_of_claims] => 20
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[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0177/20040177187.pdf
[firstpage_image] =>[orig_patent_app_number] => 10370004
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/370004 | System and method for arbitrating access between common access requests on a bus | Feb 19, 2003 | Issued |
Array
(
[id] => 7174025
[patent_doc_number] => 20040078505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-22
[patent_title] => 'Portable USB device built with rechargeable functional apparatus'
[patent_app_type] => new
[patent_app_number] => 10/357367
[patent_app_country] => US
[patent_app_date] => 2003-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1460
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0078/20040078505.pdf
[firstpage_image] =>[orig_patent_app_number] => 10357367
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/357367 | Portable USB device built with rechargeable functional apparatus | Feb 3, 2003 | Issued |
Array
(
[id] => 7611355
[patent_doc_number] => 06904487
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-07
[patent_title] => 'Apparatus and method for generating distributed traffic'
[patent_app_type] => utility
[patent_app_number] => 10/356716
[patent_app_country] => US
[patent_app_date] => 2003-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2643
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/904/06904487.pdf
[firstpage_image] =>[orig_patent_app_number] => 10356716
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/356716 | Apparatus and method for generating distributed traffic | Feb 2, 2003 | Issued |
Array
(
[id] => 7678318
[patent_doc_number] => 20030196018
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-16
[patent_title] => 'Electrical circuit for a bus interface and/or a bus bridge'
[patent_app_type] => new
[patent_app_number] => 10/356307
[patent_app_country] => US
[patent_app_date] => 2003-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2256
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0196/20030196018.pdf
[firstpage_image] =>[orig_patent_app_number] => 10356307
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/356307 | Electrical circuit for a bus interface and/or a bus bridge for performing a function | Jan 30, 2003 | Issued |
Array
(
[id] => 7418042
[patent_doc_number] => 20040177209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-09
[patent_title] => 'Integrated circuit routing resource optimization algorithm for random port ordering'
[patent_app_type] => new
[patent_app_number] => 10/355775
[patent_app_country] => US
[patent_app_date] => 2003-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2345
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0177/20040177209.pdf
[firstpage_image] =>[orig_patent_app_number] => 10355775
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/355775 | Integrated circuit routing resource optimization algorithm for random port ordering | Jan 30, 2003 | Issued |
Array
(
[id] => 7676231
[patent_doc_number] => 20040153596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-05
[patent_title] => 'Method and apparatus for dynamic prioritization of interrupts'
[patent_app_type] => new
[patent_app_number] => 10/356130
[patent_app_country] => US
[patent_app_date] => 2003-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3663
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20040153596.pdf
[firstpage_image] =>[orig_patent_app_number] => 10356130
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/356130 | Method and apparatus for processing interrupts at dynamically selectable prioritization levels | Jan 30, 2003 | Issued |
Array
(
[id] => 704985
[patent_doc_number] => 07069370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-06-27
[patent_title] => 'USB memory storage apparatus with integrated circuit in a connector'
[patent_app_type] => utility
[patent_app_number] => 10/355214
[patent_app_country] => US
[patent_app_date] => 2003-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 5209
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/069/07069370.pdf
[firstpage_image] =>[orig_patent_app_number] => 10355214
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/355214 | USB memory storage apparatus with integrated circuit in a connector | Jan 30, 2003 | Issued |
Array
(
[id] => 7290896
[patent_doc_number] => 20040148450
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-29
[patent_title] => 'Serially connectable USB drive'
[patent_app_type] => new
[patent_app_number] => 10/351393
[patent_app_country] => US
[patent_app_date] => 2003-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 1785
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0148/20040148450.pdf
[firstpage_image] =>[orig_patent_app_number] => 10351393
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/351393 | Serially connectable USB drive | Jan 26, 2003 | Abandoned |
Array
(
[id] => 1361034
[patent_doc_number] => 06587906
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-01
[patent_title] => 'Parallel multi-threaded processing'
[patent_app_type] => B2
[patent_app_number] => 10/339221
[patent_app_country] => US
[patent_app_date] => 2003-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5212
[patent_no_of_claims] => 17
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[patent_words_short_claim] => 87
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/587/06587906.pdf
[firstpage_image] =>[orig_patent_app_number] => 10339221
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/339221 | Parallel multi-threaded processing | Jan 8, 2003 | Issued |
Array
(
[id] => 7673698
[patent_doc_number] => 20040128420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-01
[patent_title] => 'Plug-and-play interconnection architecture and method with in-device storage module in peripheral device'
[patent_app_type] => new
[patent_app_number] => 10/334761
[patent_app_country] => US
[patent_app_date] => 2002-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4504
[patent_no_of_claims] => 24
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20040128420.pdf
[firstpage_image] =>[orig_patent_app_number] => 10334761
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/334761 | Plug-and-play interconnection architecture and method with in-device storage module in peripheral device | Dec 29, 2002 | Issued |
Array
(
[id] => 945742
[patent_doc_number] => 06968408
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-11-22
[patent_title] => 'Linking addressable shadow port and protocol for serial bus networks'
[patent_app_type] => utility
[patent_app_number] => 10/331628
[patent_app_country] => US
[patent_app_date] => 2002-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
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[pdf_file] => patents/06/968/06968408.pdf
[firstpage_image] =>[orig_patent_app_number] => 10331628
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/331628 | Linking addressable shadow port and protocol for serial bus networks | Dec 29, 2002 | Issued |
Array
(
[id] => 7476790
[patent_doc_number] => 20040123006
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-24
[patent_title] => 'Process and apparatus for managing use of a peripheral bus among a plurality of controllers'
[patent_app_type] => new
[patent_app_number] => 10/328462
[patent_app_country] => US
[patent_app_date] => 2002-12-23
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[patent_drawing_sheets_cnt] => 3
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[pdf_file] => publications/A1/0123/20040123006.pdf
[firstpage_image] =>[orig_patent_app_number] => 10328462
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/328462 | Process and apparatus for managing use of a peripheral bus among a plurality of controllers | Dec 22, 2002 | Issued |
Array
(
[id] => 7476798
[patent_doc_number] => 20040123013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-24
[patent_title] => 'Direct memory access controller system'
[patent_app_type] => new
[patent_app_number] => 10/324310
[patent_app_country] => US
[patent_app_date] => 2002-12-19
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[pdf_file] => publications/A1/0123/20040123013.pdf
[firstpage_image] =>[orig_patent_app_number] => 10324310
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/324310 | Direct memory access controller system with message-based programming | Dec 18, 2002 | Issued |
Array
(
[id] => 1206840
[patent_doc_number] => 06721837
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-13
[patent_title] => 'Graphics display system with unified memory architecture'
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[patent_app_number] => 10/322059
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[pdf_file] => patents/06/721/06721837.pdf
[firstpage_image] =>[orig_patent_app_number] => 10322059
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/322059 | Graphics display system with unified memory architecture | Dec 16, 2002 | Issued |
Array
(
[id] => 771262
[patent_doc_number] => 07010631
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-07
[patent_title] => 'Controller based hardware device and method for setting the same'
[patent_app_type] => utility
[patent_app_number] => 10/498193
[patent_app_country] => US
[patent_app_date] => 2002-12-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/010/07010631.pdf
[firstpage_image] =>[orig_patent_app_number] => 10498193
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/498193 | Controller based hardware device and method for setting the same | Dec 10, 2002 | Issued |
Array
(
[id] => 7308876
[patent_doc_number] => 20040117536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-17
[patent_title] => 'Apparatus, method and program product for automatically distributing power to modules inserted in live chassis'
[patent_app_type] => new
[patent_app_number] => 10/306305
[patent_app_country] => US
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[pdf_file] => publications/A1/0117/20040117536.pdf
[firstpage_image] =>[orig_patent_app_number] => 10306305
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/306305 | Apparatus, method and program product for automatically distributing power to modules inserted in live chassis | Nov 26, 2002 | Issued |
Array
(
[id] => 992623
[patent_doc_number] => 06920513
[patent_country] => US
[patent_kind] => B2
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[patent_title] => 'Bus management techniques'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 10306038
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/306038 | Bus management techniques | Nov 25, 2002 | Issued |
Array
(
[id] => 6802348
[patent_doc_number] => 20030097513
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[patent_issue_date] => 2003-05-22
[patent_title] => 'l/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures'
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[patent_app_number] => 10/304252
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[pdf_file] => publications/A1/0097/20030097513.pdf
[firstpage_image] =>[orig_patent_app_number] => 10304252
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/304252 | I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures | Nov 25, 2002 | Issued |
Array
(
[id] => 787588
[patent_doc_number] => 06990541
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[patent_title] => 'Arbitration unit for prioritizing requests based on multiple request groups'
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/990/06990541.pdf
[firstpage_image] =>[orig_patent_app_number] => 10302133
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/302133 | Arbitration unit for prioritizing requests based on multiple request groups | Nov 21, 2002 | Issued |