Search

Salvatore A Cangialosi

Examiner (ID: 11118)

Most Active Art Unit
2202
Art Unit(s)
2304, 2746, 3305, 2766, 3642, 2661, 2200, 2201, 2202, 2732, 3402, 3621, 2899
Total Applications
2208
Issued Applications
1964
Pending Applications
90
Abandoned Applications
154

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5846847 [patent_doc_number] => 20060123178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Generating multiple traffic classes on a PCI Express fabric from PCI devices' [patent_app_type] => utility [patent_app_number] => 11/340954 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1819 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20060123178.pdf [firstpage_image] =>[orig_patent_app_number] => 11340954 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/340954
Generating multiple traffic classes on a PCI Express fabric from PCI devices Jan 26, 2006 Abandoned
Array ( [id] => 497896 [patent_doc_number] => 07216191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'System for programmed control of signal input and output to and from cable conductors' [patent_app_type] => utility [patent_app_number] => 11/296134 [patent_app_country] => US [patent_app_date] => 2005-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7353 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/216/07216191.pdf [firstpage_image] =>[orig_patent_app_number] => 11296134 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/296134
System for programmed control of signal input and output to and from cable conductors Dec 5, 2005 Issued
Array ( [id] => 5728531 [patent_doc_number] => 20060059292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Method and an apparatus to efficiently handle read completions that satisfy a read request' [patent_app_type] => utility [patent_app_number] => 11/270148 [patent_app_country] => US [patent_app_date] => 2005-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2975 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20060059292.pdf [firstpage_image] =>[orig_patent_app_number] => 11270148 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270148
Method and an apparatus to efficiently handle read completions that satisfy a read request Nov 7, 2005 Issued
Array ( [id] => 894392 [patent_doc_number] => 07350010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Method and an apparatus for switching root cells for a computer system without requiring the computer system to be re-booted' [patent_app_type] => utility [patent_app_number] => 11/261374 [patent_app_country] => US [patent_app_date] => 2005-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/350/07350010.pdf [firstpage_image] =>[orig_patent_app_number] => 11261374 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/261374
Method and an apparatus for switching root cells for a computer system without requiring the computer system to be re-booted Oct 27, 2005 Issued
Array ( [id] => 7600063 [patent_doc_number] => 07386647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'System and method for processing an interrupt in a processor supporting multithread execution' [patent_app_type] => utility [patent_app_number] => 11/251216 [patent_app_country] => US [patent_app_date] => 2005-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2397 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/386/07386647.pdf [firstpage_image] =>[orig_patent_app_number] => 11251216 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/251216
System and method for processing an interrupt in a processor supporting multithread execution Oct 13, 2005 Issued
Array ( [id] => 392771 [patent_doc_number] => 07302511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Chipset support for managing hardware interrupts in a virtual machine system' [patent_app_type] => utility [patent_app_number] => 11/251282 [patent_app_country] => US [patent_app_date] => 2005-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6023 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/302/07302511.pdf [firstpage_image] =>[orig_patent_app_number] => 11251282 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/251282
Chipset support for managing hardware interrupts in a virtual machine system Oct 12, 2005 Issued
Array ( [id] => 885532 [patent_doc_number] => 07356638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'Using out-of-band signaling to provide communication between storage controllers in a computer storage system' [patent_app_type] => utility [patent_app_number] => 11/248559 [patent_app_country] => US [patent_app_date] => 2005-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2631 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/356/07356638.pdf [firstpage_image] =>[orig_patent_app_number] => 11248559 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/248559
Using out-of-band signaling to provide communication between storage controllers in a computer storage system Oct 11, 2005 Issued
Array ( [id] => 900024 [patent_doc_number] => 07343439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-11 [patent_title] => 'Removable modules with external I/O flexibility via an integral second-level removable slot' [patent_app_type] => utility [patent_app_number] => 11/226061 [patent_app_country] => US [patent_app_date] => 2005-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 8869 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/343/07343439.pdf [firstpage_image] =>[orig_patent_app_number] => 11226061 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/226061
Removable modules with external I/O flexibility via an integral second-level removable slot Sep 12, 2005 Issued
Array ( [id] => 5717122 [patent_doc_number] => 20060080485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Bus system and semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/213795 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9317 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20060080485.pdf [firstpage_image] =>[orig_patent_app_number] => 11213795 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213795
Bus system and integrated circuit having an address monitor unit Aug 29, 2005 Issued
Array ( [id] => 890215 [patent_doc_number] => 07353307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'Linking addressable shadow port and protocol for serial bus networks' [patent_app_type] => utility [patent_app_number] => 11/212156 [patent_app_country] => US [patent_app_date] => 2005-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 53 [patent_no_of_words] => 8150 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/353/07353307.pdf [firstpage_image] =>[orig_patent_app_number] => 11212156 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/212156
Linking addressable shadow port and protocol for serial bus networks Aug 25, 2005 Issued
Array ( [id] => 558789 [patent_doc_number] => 07177965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Linking addressable shadow port and protocol for serial bus networks' [patent_app_type] => utility [patent_app_number] => 11/213254 [patent_app_country] => US [patent_app_date] => 2005-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 53 [patent_no_of_words] => 8127 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177965.pdf [firstpage_image] =>[orig_patent_app_number] => 11213254 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213254
Linking addressable shadow port and protocol for serial bus networks Aug 25, 2005 Issued
Array ( [id] => 431311 [patent_doc_number] => 07269682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Segmented interconnect for connecting multiple agents in a system' [patent_app_type] => utility [patent_app_number] => 11/201573 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5593 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/269/07269682.pdf [firstpage_image] =>[orig_patent_app_number] => 11201573 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201573
Segmented interconnect for connecting multiple agents in a system Aug 10, 2005 Issued
Array ( [id] => 5052966 [patent_doc_number] => 20070033511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Methods and apparatus for processor system having fault tolerance' [patent_app_type] => utility [patent_app_number] => 11/198198 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20070033511.pdf [firstpage_image] =>[orig_patent_app_number] => 11198198 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198198
System having parallel data processors which generate redundant effector date to detect errors Aug 4, 2005 Issued
Array ( [id] => 623183 [patent_doc_number] => 07143216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-28 [patent_title] => 'System for configuring expandable buses in a multi-device storage container and related method' [patent_app_type] => utility [patent_app_number] => 11/195415 [patent_app_country] => US [patent_app_date] => 2005-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3320 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/143/07143216.pdf [firstpage_image] =>[orig_patent_app_number] => 11195415 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/195415
System for configuring expandable buses in a multi-device storage container and related method Aug 1, 2005 Issued
Array ( [id] => 721575 [patent_doc_number] => 07054977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Method of handling data in a network device' [patent_app_type] => utility [patent_app_number] => 11/176353 [patent_app_country] => US [patent_app_date] => 2005-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3865 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/054/07054977.pdf [firstpage_image] =>[orig_patent_app_number] => 11176353 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/176353
Method of handling data in a network device Jul 7, 2005 Issued
Array ( [id] => 7071087 [patent_doc_number] => 20050246472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'Universal serial bus circuit which detects connection status to a USB host' [patent_app_type] => utility [patent_app_number] => 11/176390 [patent_app_country] => US [patent_app_date] => 2005-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3731 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20050246472.pdf [firstpage_image] =>[orig_patent_app_number] => 11176390 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/176390
Universal serial bus circuit which detects connection status to a USB host Jul 7, 2005 Issued
Array ( [id] => 5770690 [patent_doc_number] => 20060020736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Method and apparatus for extending communications over USB' [patent_app_type] => utility [patent_app_number] => 11/173987 [patent_app_country] => US [patent_app_date] => 2005-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 35402 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20060020736.pdf [firstpage_image] =>[orig_patent_app_number] => 11173987 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173987
Method and apparatus for extending communications over a universal serial bus through domain transformation Jun 30, 2005 Issued
Array ( [id] => 5143638 [patent_doc_number] => 20070005854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'SIGNAL INITIATOR AND METHOD FOR ON-DEMAND COMMUNICATION' [patent_app_type] => utility [patent_app_number] => 11/171074 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4569 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20070005854.pdf [firstpage_image] =>[orig_patent_app_number] => 11171074 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/171074
Signal initiator and method for on-demand communication Jun 29, 2005 Issued
Array ( [id] => 478180 [patent_doc_number] => 07231474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-06-12 [patent_title] => 'Serial interface having a read temperature command' [patent_app_type] => utility [patent_app_number] => 11/140803 [patent_app_country] => US [patent_app_date] => 2005-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/231/07231474.pdf [firstpage_image] =>[orig_patent_app_number] => 11140803 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/140803
Serial interface having a read temperature command May 30, 2005 Issued
Array ( [id] => 912111 [patent_doc_number] => 07334071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-19 [patent_title] => 'Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridge' [patent_app_type] => utility [patent_app_number] => 11/138853 [patent_app_country] => US [patent_app_date] => 2005-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10836 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/334/07334071.pdf [firstpage_image] =>[orig_patent_app_number] => 11138853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/138853
Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridge May 24, 2005 Issued
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