![](/images/general/no_picture/200_user.png)
Salvatore A Cangialosi
Examiner (ID: 11118)
Most Active Art Unit | 2202 |
Art Unit(s) | 2304, 2746, 3305, 2766, 3642, 2661, 2200, 2201, 2202, 2732, 3402, 3621, 2899 |
Total Applications | 2208 |
Issued Applications | 1964 |
Pending Applications | 90 |
Abandoned Applications | 154 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5846847
[patent_doc_number] => 20060123178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-08
[patent_title] => 'Generating multiple traffic classes on a PCI Express fabric from PCI devices'
[patent_app_type] => utility
[patent_app_number] => 11/340954
[patent_app_country] => US
[patent_app_date] => 2006-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => publications/A1/0123/20060123178.pdf
[firstpage_image] =>[orig_patent_app_number] => 11340954
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/340954 | Generating multiple traffic classes on a PCI Express fabric from PCI devices | Jan 26, 2006 | Abandoned |
Array
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[id] => 497896
[patent_doc_number] => 07216191
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-05-08
[patent_title] => 'System for programmed control of signal input and output to and from cable conductors'
[patent_app_type] => utility
[patent_app_number] => 11/296134
[patent_app_country] => US
[patent_app_date] => 2005-12-06
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[pdf_file] => patents/07/216/07216191.pdf
[firstpage_image] =>[orig_patent_app_number] => 11296134
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/296134 | System for programmed control of signal input and output to and from cable conductors | Dec 5, 2005 | Issued |
Array
(
[id] => 5728531
[patent_doc_number] => 20060059292
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Method and an apparatus to efficiently handle read completions that satisfy a read request'
[patent_app_type] => utility
[patent_app_number] => 11/270148
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[patent_app_date] => 2005-11-08
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[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0059/20060059292.pdf
[firstpage_image] =>[orig_patent_app_number] => 11270148
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/270148 | Method and an apparatus to efficiently handle read completions that satisfy a read request | Nov 7, 2005 | Issued |
Array
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[id] => 894392
[patent_doc_number] => 07350010
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[patent_issue_date] => 2008-03-25
[patent_title] => 'Method and an apparatus for switching root cells for a computer system without requiring the computer system to be re-booted'
[patent_app_type] => utility
[patent_app_number] => 11/261374
[patent_app_country] => US
[patent_app_date] => 2005-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/07/350/07350010.pdf
[firstpage_image] =>[orig_patent_app_number] => 11261374
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/261374 | Method and an apparatus for switching root cells for a computer system without requiring the computer system to be re-booted | Oct 27, 2005 | Issued |
Array
(
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[patent_doc_number] => 07386647
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[patent_issue_date] => 2008-06-10
[patent_title] => 'System and method for processing an interrupt in a processor supporting multithread execution'
[patent_app_type] => utility
[patent_app_number] => 11/251216
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[patent_app_date] => 2005-10-14
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[pdf_file] => patents/07/386/07386647.pdf
[firstpage_image] =>[orig_patent_app_number] => 11251216
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/251216 | System and method for processing an interrupt in a processor supporting multithread execution | Oct 13, 2005 | Issued |
Array
(
[id] => 392771
[patent_doc_number] => 07302511
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[patent_issue_date] => 2007-11-27
[patent_title] => 'Chipset support for managing hardware interrupts in a virtual machine system'
[patent_app_type] => utility
[patent_app_number] => 11/251282
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[patent_app_date] => 2005-10-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/251282 | Chipset support for managing hardware interrupts in a virtual machine system | Oct 12, 2005 | Issued |
Array
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[id] => 885532
[patent_doc_number] => 07356638
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[patent_issue_date] => 2008-04-08
[patent_title] => 'Using out-of-band signaling to provide communication between storage controllers in a computer storage system'
[patent_app_type] => utility
[patent_app_number] => 11/248559
[patent_app_country] => US
[patent_app_date] => 2005-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2631
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[pdf_file] => patents/07/356/07356638.pdf
[firstpage_image] =>[orig_patent_app_number] => 11248559
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/248559 | Using out-of-band signaling to provide communication between storage controllers in a computer storage system | Oct 11, 2005 | Issued |
Array
(
[id] => 900024
[patent_doc_number] => 07343439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-03-11
[patent_title] => 'Removable modules with external I/O flexibility via an integral second-level removable slot'
[patent_app_type] => utility
[patent_app_number] => 11/226061
[patent_app_country] => US
[patent_app_date] => 2005-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 28
[patent_no_of_words] => 8869
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[pdf_file] => patents/07/343/07343439.pdf
[firstpage_image] =>[orig_patent_app_number] => 11226061
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/226061 | Removable modules with external I/O flexibility via an integral second-level removable slot | Sep 12, 2005 | Issued |
Array
(
[id] => 5717122
[patent_doc_number] => 20060080485
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-13
[patent_title] => 'Bus system and semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/213795
[patent_app_country] => US
[patent_app_date] => 2005-08-30
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[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0080/20060080485.pdf
[firstpage_image] =>[orig_patent_app_number] => 11213795
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/213795 | Bus system and integrated circuit having an address monitor unit | Aug 29, 2005 | Issued |
Array
(
[id] => 890215
[patent_doc_number] => 07353307
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[patent_kind] => B2
[patent_issue_date] => 2008-04-01
[patent_title] => 'Linking addressable shadow port and protocol for serial bus networks'
[patent_app_type] => utility
[patent_app_number] => 11/212156
[patent_app_country] => US
[patent_app_date] => 2005-08-26
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[pdf_file] => patents/07/353/07353307.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/212156 | Linking addressable shadow port and protocol for serial bus networks | Aug 25, 2005 | Issued |
Array
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[id] => 558789
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[patent_title] => 'Linking addressable shadow port and protocol for serial bus networks'
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Array
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[id] => 431311
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[patent_title] => 'Segmented interconnect for connecting multiple agents in a system'
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Array
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[id] => 5052966
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[patent_title] => 'Methods and apparatus for processor system having fault tolerance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/198198 | System having parallel data processors which generate redundant effector date to detect errors | Aug 4, 2005 | Issued |
Array
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Array
(
[id] => 721575
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/176353 | Method of handling data in a network device | Jul 7, 2005 | Issued |
Array
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[patent_title] => 'Universal serial bus circuit which detects connection status to a USB host'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/173987 | Method and apparatus for extending communications over a universal serial bus through domain transformation | Jun 30, 2005 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/138853 | Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridge | May 24, 2005 | Issued |