Search

Salvatore A Cangialosi

Examiner (ID: 11118)

Most Active Art Unit
2202
Art Unit(s)
2304, 2746, 3305, 2766, 3642, 2661, 2200, 2201, 2202, 2732, 3402, 3621, 2899
Total Applications
2208
Issued Applications
1964
Pending Applications
90
Abandoned Applications
154

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5627032 [patent_doc_number] => 20060265537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Shared-IRQ user defined interrupt signal handling method and system' [patent_app_type] => utility [patent_app_number] => 11/134571 [patent_app_country] => US [patent_app_date] => 2005-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3044 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20060265537.pdf [firstpage_image] =>[orig_patent_app_number] => 11134571 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/134571
Shared-IRQ user defined interrupt signal handling method and system May 18, 2005 Issued
Array ( [id] => 6962096 [patent_doc_number] => 20050216645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Switch for distributed arbitration digital data buses' [patent_app_type] => utility [patent_app_number] => 11/130082 [patent_app_country] => US [patent_app_date] => 2005-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 23856 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20050216645.pdf [firstpage_image] =>[orig_patent_app_number] => 11130082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/130082
Switch for distributed arbitration digital data buses May 15, 2005 Abandoned
Array ( [id] => 507952 [patent_doc_number] => 07209988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Management of the freezing of a functional module in a system on a chip' [patent_app_type] => utility [patent_app_number] => 11/127793 [patent_app_country] => US [patent_app_date] => 2005-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5922 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209988.pdf [firstpage_image] =>[orig_patent_app_number] => 11127793 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/127793
Management of the freezing of a functional module in a system on a chip May 11, 2005 Issued
Array ( [id] => 411364 [patent_doc_number] => 07287114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Simulating multiple virtual channels in switched fabric networks' [patent_app_type] => utility [patent_app_number] => 11/126443 [patent_app_country] => US [patent_app_date] => 2005-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3187 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/287/07287114.pdf [firstpage_image] =>[orig_patent_app_number] => 11126443 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/126443
Simulating multiple virtual channels in switched fabric networks May 9, 2005 Issued
Array ( [id] => 7600065 [patent_doc_number] => 07386645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'System on a chip with an arbitration unit to grant right of access to a common resource in response to conflicting requests for access from initiator modules, and storage key incorporating the arbitration unit' [patent_app_type] => utility [patent_app_number] => 11/120167 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4337 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/386/07386645.pdf [firstpage_image] =>[orig_patent_app_number] => 11120167 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/120167
System on a chip with an arbitration unit to grant right of access to a common resource in response to conflicting requests for access from initiator modules, and storage key incorporating the arbitration unit May 1, 2005 Issued
Array ( [id] => 5852811 [patent_doc_number] => 20060236002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Optimizing an interrupt-latency or a polling rate for a hardware platform and network profile combination' [patent_app_type] => utility [patent_app_number] => 11/107563 [patent_app_country] => US [patent_app_date] => 2005-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4947 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20060236002.pdf [firstpage_image] =>[orig_patent_app_number] => 11107563 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/107563
Optmizing an interrupt-latency or a polling rate for a hardware platform and network profile combination by adjusting current timer values for both receive and transmit directions of traffic and calculating a new timer value to be used for both receive and transmit directions of traffic Apr 13, 2005 Issued
Array ( [id] => 5861605 [patent_doc_number] => 20060230219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Virtualization of an I/O adapter port using enablement and activation functions' [patent_app_type] => utility [patent_app_number] => 11/100837 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6336 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20060230219.pdf [firstpage_image] =>[orig_patent_app_number] => 11100837 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/100837
Virtualization of an I/O adapter port using enablement and activation functions Apr 6, 2005 Issued
Array ( [id] => 6913911 [patent_doc_number] => 20050177669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-11 [patent_title] => 'Wireless device attachment and detachment system, apparatus and method' [patent_app_type] => utility [patent_app_number] => 11/100763 [patent_app_country] => US [patent_app_date] => 2005-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5897 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20050177669.pdf [firstpage_image] =>[orig_patent_app_number] => 11100763 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/100763
Wireless device attachment and detachment system, apparatus and method Apr 5, 2005 Issued
Array ( [id] => 507965 [patent_doc_number] => 07209990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Maintain fairness of resource allocation in a multi-node environment' [patent_app_type] => utility [patent_app_number] => 11/099771 [patent_app_country] => US [patent_app_date] => 2005-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209990.pdf [firstpage_image] =>[orig_patent_app_number] => 11099771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/099771
Maintain fairness of resource allocation in a multi-node environment Apr 4, 2005 Issued
Array ( [id] => 7021464 [patent_doc_number] => 20050223152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Semiconductor memory device and method of outputting data signals' [patent_app_type] => utility [patent_app_number] => 11/090357 [patent_app_country] => US [patent_app_date] => 2005-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10413 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20050223152.pdf [firstpage_image] =>[orig_patent_app_number] => 11090357 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/090357
Semiconductor memory device with bus driver circuit configured to transfer an output on a common bus onto an output bus with inversion or no inversion Mar 27, 2005 Issued
Array ( [id] => 512827 [patent_doc_number] => 07206889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Systems and methods for enabling communications among devices in a multi-cache line size environment and disabling communications among devices of incompatible cache line sizes' [patent_app_type] => utility [patent_app_number] => 11/085883 [patent_app_country] => US [patent_app_date] => 2005-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4756 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206889.pdf [firstpage_image] =>[orig_patent_app_number] => 11085883 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/085883
Systems and methods for enabling communications among devices in a multi-cache line size environment and disabling communications among devices of incompatible cache line sizes Mar 21, 2005 Issued
Array ( [id] => 7206590 [patent_doc_number] => 20050165995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'System of distributed microprocessor interfaces toward macro-cell based designs implemented as ASIC or FPGA bread boarding and relative COMMON BUS protocol' [patent_app_type] => utility [patent_app_number] => 11/081913 [patent_app_country] => US [patent_app_date] => 2005-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 56 [patent_no_of_words] => 87516 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11081913 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/081913
Interface bus protocol for managing transactions in a system of distributed microprocessor interfaces toward marco-cell based designs implemented as ASIC or FPGA bread boarding Mar 16, 2005 Issued
Array ( [id] => 626296 [patent_doc_number] => 07139852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing' [patent_app_type] => utility [patent_app_number] => 11/082572 [patent_app_country] => US [patent_app_date] => 2005-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8338 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139852.pdf [firstpage_image] =>[orig_patent_app_number] => 11082572 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/082572
Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing Mar 15, 2005 Issued
Array ( [id] => 5916306 [patent_doc_number] => 20060129734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Method for accessing data' [patent_app_type] => utility [patent_app_number] => 11/074627 [patent_app_country] => US [patent_app_date] => 2005-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20060129734.pdf [firstpage_image] =>[orig_patent_app_number] => 11074627 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/074627
Method of transferring data between computer peripherals Mar 8, 2005 Issued
Array ( [id] => 7605740 [patent_doc_number] => 07099982 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-29 [patent_title] => 'Multi-port communications integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/072325 [patent_app_country] => US [patent_app_date] => 2005-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1554 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099982.pdf [firstpage_image] =>[orig_patent_app_number] => 11072325 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/072325
Multi-port communications integrated circuit Mar 6, 2005 Issued
Array ( [id] => 507996 [patent_doc_number] => 07209994 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-24 [patent_title] => 'Processor that maintains virtual interrupt state and injects virtual interrupts into virtual machine guests' [patent_app_type] => utility [patent_app_number] => 11/066019 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 11594 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209994.pdf [firstpage_image] =>[orig_patent_app_number] => 11066019 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/066019
Processor that maintains virtual interrupt state and injects virtual interrupts into virtual machine guests Feb 24, 2005 Issued
Array ( [id] => 553228 [patent_doc_number] => 07174403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'Plural bus arbitrations per cycle via higher-frequency arbiter' [patent_app_type] => utility [patent_app_number] => 11/066507 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2360 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/174/07174403.pdf [firstpage_image] =>[orig_patent_app_number] => 11066507 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/066507
Plural bus arbitrations per cycle via higher-frequency arbiter Feb 23, 2005 Issued
Array ( [id] => 434859 [patent_doc_number] => 07266629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'Data transfer control device and electronic instrument generating interface signal of signal type according to interface information set in internal register' [patent_app_type] => utility [patent_app_number] => 11/063007 [patent_app_country] => US [patent_app_date] => 2005-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 30 [patent_no_of_words] => 14059 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/266/07266629.pdf [firstpage_image] =>[orig_patent_app_number] => 11063007 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/063007
Data transfer control device and electronic instrument generating interface signal of signal type according to interface information set in internal register Feb 21, 2005 Issued
Array ( [id] => 7261798 [patent_doc_number] => 20050144351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Computer accessory device-USB sharer' [patent_app_type] => utility [patent_app_number] => 11/059395 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3861 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20050144351.pdf [firstpage_image] =>[orig_patent_app_number] => 11059395 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059395
Computer accessory device-USB sharer Feb 16, 2005 Abandoned
Array ( [id] => 641064 [patent_doc_number] => 07127546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Simplified USB sharer having a busyness detection circuit' [patent_app_type] => utility [patent_app_number] => 11/059358 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3813 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/127/07127546.pdf [firstpage_image] =>[orig_patent_app_number] => 11059358 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059358
Simplified USB sharer having a busyness detection circuit Feb 16, 2005 Issued
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