Search

Salvatore A Cangialosi

Examiner (ID: 11118)

Most Active Art Unit
2202
Art Unit(s)
2304, 2746, 3305, 2766, 3642, 2661, 2200, 2201, 2202, 2732, 3402, 3621, 2899
Total Applications
2208
Issued Applications
1964
Pending Applications
90
Abandoned Applications
154

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5722396 [patent_doc_number] => 20060075172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Method for applying interrupt coalescing to incoming messages based on message length' [patent_app_type] => utility [patent_app_number] => 10/955179 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20060075172.pdf [firstpage_image] =>[orig_patent_app_number] => 10955179 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/955179
Method for applying interrupt coalescing to incoming messages based on message length Sep 29, 2004 Issued
Array ( [id] => 438325 [patent_doc_number] => 07263569 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-08-28 [patent_title] => 'Method and system for distributing power in a computer system' [patent_app_type] => utility [patent_app_number] => 10/955354 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2965 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263569.pdf [firstpage_image] =>[orig_patent_app_number] => 10955354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/955354
Method and system for distributing power in a computer system Sep 29, 2004 Issued
Array ( [id] => 518102 [patent_doc_number] => 07203778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Method and system for notifying clients of a specific change in a data processing system' [patent_app_type] => utility [patent_app_number] => 10/944100 [patent_app_country] => US [patent_app_date] => 2004-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203778.pdf [firstpage_image] =>[orig_patent_app_number] => 10944100 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/944100
Method and system for notifying clients of a specific change in a data processing system Sep 16, 2004 Issued
Array ( [id] => 535749 [patent_doc_number] => 07191266 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-03-13 [patent_title] => 'Method and apparatus for supporting and presenting multiple serial bus nodes using distinct configuration ROM images' [patent_app_type] => utility [patent_app_number] => 10/944265 [patent_app_country] => US [patent_app_date] => 2004-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4285 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/191/07191266.pdf [firstpage_image] =>[orig_patent_app_number] => 10944265 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/944265
Method and apparatus for supporting and presenting multiple serial bus nodes using distinct configuration ROM images Sep 14, 2004 Issued
Array ( [id] => 749298 [patent_doc_number] => 07032063 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-18 [patent_title] => 'Multi-port storage communications controller' [patent_app_type] => utility [patent_app_number] => 10/903290 [patent_app_country] => US [patent_app_date] => 2004-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6703 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/032/07032063.pdf [firstpage_image] =>[orig_patent_app_number] => 10903290 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/903290
Multi-port storage communications controller Jul 29, 2004 Issued
Array ( [id] => 7128970 [patent_doc_number] => 20050060454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'I/O throughput by pre-termination arbitration' [patent_app_type] => utility [patent_app_number] => 10/895654 [patent_app_country] => US [patent_app_date] => 2004-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20050060454.pdf [firstpage_image] =>[orig_patent_app_number] => 10895654 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/895654
I/O throughput by pre-termination arbitration Jul 20, 2004 Issued
Array ( [id] => 5770684 [patent_doc_number] => 20060020730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Single BIOS technique for supporting processors with and without 64-bit extensions' [patent_app_type] => utility [patent_app_number] => 10/895489 [patent_app_country] => US [patent_app_date] => 2004-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2792 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20060020730.pdf [firstpage_image] =>[orig_patent_app_number] => 10895489 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/895489
Single BIOS technique for supporting processors with and without 64-bit extensions Jul 19, 2004 Issued
Array ( [id] => 7030354 [patent_doc_number] => 20050021893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Interrup processing circuit of computer system' [patent_app_type] => utility [patent_app_number] => 10/892350 [patent_app_country] => US [patent_app_date] => 2004-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2252 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20050021893.pdf [firstpage_image] =>[orig_patent_app_number] => 10892350 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/892350
Interrupt signal processing circuit for sending interrupt requests to a computer system Jul 15, 2004 Issued
Array ( [id] => 7232830 [patent_doc_number] => 20050262285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Data communication cable for connection between mobile communication terminal and computer' [patent_app_type] => utility [patent_app_number] => 10/893111 [patent_app_country] => US [patent_app_date] => 2004-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2447 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20050262285.pdf [firstpage_image] =>[orig_patent_app_number] => 10893111 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/893111
Data communication cable for connection between mobile communication terminal and computer Jul 15, 2004 Abandoned
Array ( [id] => 5795080 [patent_doc_number] => 20060015761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Dynamic lane, voltage and frequency adjustment for serial interconnect' [patent_app_type] => utility [patent_app_number] => 10/882544 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5277 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20060015761.pdf [firstpage_image] =>[orig_patent_app_number] => 10882544 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882544
Dynamic lane, voltage and frequency adjustment for serial interconnect Jun 29, 2004 Issued
Array ( [id] => 581235 [patent_doc_number] => 07159046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'Method and apparatus for configuring communication between devices in a computer system' [patent_app_type] => utility [patent_app_number] => 10/881326 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4757 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/159/07159046.pdf [firstpage_image] =>[orig_patent_app_number] => 10881326 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/881326
Method and apparatus for configuring communication between devices in a computer system Jun 28, 2004 Issued
Array ( [id] => 6979553 [patent_doc_number] => 20050289271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Circuitry to selectively produce MSI signals' [patent_app_type] => utility [patent_app_number] => 10/881076 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4037 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20050289271.pdf [firstpage_image] =>[orig_patent_app_number] => 10881076 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/881076
Circuitry to selectively produce MSI signals Jun 28, 2004 Abandoned
Array ( [id] => 7057296 [patent_doc_number] => 20050278471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-15 [patent_title] => 'DATA PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 10/710030 [patent_app_country] => US [patent_app_date] => 2004-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3952 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20050278471.pdf [firstpage_image] =>[orig_patent_app_number] => 10710030 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/710030
Data processing system Jun 13, 2004 Issued
Array ( [id] => 7177764 [patent_doc_number] => 20050204089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'METHOD AND RELATED SYSTEM FOR ACCESSING LPC MEMORY OR FIRMWARE MEMORY IN A COMPUTER SYSTEM' [patent_app_type] => utility [patent_app_number] => 10/710016 [patent_app_country] => US [patent_app_date] => 2004-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2516 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20050204089.pdf [firstpage_image] =>[orig_patent_app_number] => 10710016 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/710016
METHOD AND RELATED SYSTEM FOR ACCESSING LPC MEMORY OR FIRMWARE MEMORY IN A COMPUTER SYSTEM Jun 12, 2004 Abandoned
Array ( [id] => 5882532 [patent_doc_number] => 20060031615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Performing arbitration in a data processing apparatus' [patent_app_type] => utility [patent_app_number] => 10/862812 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7855 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20060031615.pdf [firstpage_image] =>[orig_patent_app_number] => 10862812 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/862812
Method of arbitrating between a plurality of transfers to be routed over a corresponding plurality of paths provided by an interconnect circuit of a data processing apparatus Jun 7, 2004 Issued
Array ( [id] => 7384525 [patent_doc_number] => 20040221080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Apparatus and method for packet incress interrupt moderation' [patent_app_type] => new [patent_app_number] => 10/861255 [patent_app_country] => US [patent_app_date] => 2004-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6980 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20040221080.pdf [firstpage_image] =>[orig_patent_app_number] => 10861255 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/861255
Apparatus and method for packet ingress interrupt moderation Jun 2, 2004 Issued
Array ( [id] => 736007 [patent_doc_number] => 07043590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Interface apparatus using single driver, computer system including interface apparatus using single driver, and related method' [patent_app_type] => utility [patent_app_number] => 10/709788 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2575 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/043/07043590.pdf [firstpage_image] =>[orig_patent_app_number] => 10709788 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/709788
Interface apparatus using single driver, computer system including interface apparatus using single driver, and related method May 27, 2004 Issued
Array ( [id] => 721566 [patent_doc_number] => 07054974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'System for end of interrupt handling' [patent_app_type] => utility [patent_app_number] => 10/839857 [patent_app_country] => US [patent_app_date] => 2004-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3163 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/054/07054974.pdf [firstpage_image] =>[orig_patent_app_number] => 10839857 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/839857
System for end of interrupt handling May 4, 2004 Issued
Array ( [id] => 7047014 [patent_doc_number] => 20050251609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-10 [patent_title] => 'Removable peripheral device' [patent_app_type] => utility [patent_app_number] => 10/839648 [patent_app_country] => US [patent_app_date] => 2004-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6010 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20050251609.pdf [firstpage_image] =>[orig_patent_app_number] => 10839648 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/839648
Removable peripheral device May 3, 2004 Abandoned
Array ( [id] => 7472167 [patent_doc_number] => 20040199707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Method and apparatus for utilizing different frequencies on a bus' [patent_app_type] => new [patent_app_number] => 10/833002 [patent_app_country] => US [patent_app_date] => 2004-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4632 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20040199707.pdf [firstpage_image] =>[orig_patent_app_number] => 10833002 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/833002
Method and apparatus for utilizing different frequencies on a bus based on a number of cards coupled to the bus Apr 27, 2004 Issued
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