Search

Sam Silverberg

Examiner (ID: 4104)

Most Active Art Unit
1502
Art Unit(s)
1308, 1309, 1101, 1742, 1502, 1311, 1733, 1102, 1305, 1304
Total Applications
1075
Issued Applications
889
Pending Applications
40
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17623148 [patent_doc_number] => 11342212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Method of manufacturing semiconductor device by setting process chamber maintenance enable state [patent_app_type] => utility [patent_app_number] => 16/802322 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16802322 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/802322
Method of manufacturing semiconductor device by setting process chamber maintenance enable state Feb 25, 2020 Issued
Array ( [id] => 16601510 [patent_doc_number] => 20210028041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/797760 [patent_app_country] => US [patent_app_date] => 2020-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16797760 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/797760
Method of manufacturing semiconductor device by setting process chamber to maintenance enable state Feb 20, 2020 Issued
Array ( [id] => 16316161 [patent_doc_number] => 20200294899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => PACKAGE SUBSTRATE WITH PARTIALLY RECESSED CAPACITOR [patent_app_type] => utility [patent_app_number] => 16/795873 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6511 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795873 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/795873
Package substrate with partially recessed capacitor Feb 19, 2020 Issued
Array ( [id] => 17978808 [patent_doc_number] => 11495683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Multiple strain states in epitaxial transistor channel through the incorporation of stress-relief defects within an underlying seed material [patent_app_type] => utility [patent_app_number] => 16/795473 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 11335 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795473 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/795473
Multiple strain states in epitaxial transistor channel through the incorporation of stress-relief defects within an underlying seed material Feb 18, 2020 Issued
Array ( [id] => 16880223 [patent_doc_number] => 11030373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => System for generating standard cell layout having engineering change order (ECO) cells [patent_app_type] => utility [patent_app_number] => 16/791906 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 38 [patent_no_of_words] => 14606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/791906
System for generating standard cell layout having engineering change order (ECO) cells Feb 13, 2020 Issued
Array ( [id] => 17284179 [patent_doc_number] => 11201223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Semiconductor device, inverter circuit, drive device, vehicle, and elevator each having a threshold-voltage-increasing portion in silicon carbide layer [patent_app_type] => utility [patent_app_number] => 16/789535 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 8751 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16789535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/789535
Semiconductor device, inverter circuit, drive device, vehicle, and elevator each having a threshold-voltage-increasing portion in silicon carbide layer Feb 12, 2020 Issued
Array ( [id] => 17319420 [patent_doc_number] => 20210408470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => ARRAY SUBSTRATE, OLED DISPLAY PANEL, AND MASK [patent_app_type] => utility [patent_app_number] => 16/768693 [patent_app_country] => US [patent_app_date] => 2020-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16768693 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/768693
Array substrate having film layer disconnected at corresponding groove and OLED display panel having the same, and mask Feb 11, 2020 Issued
Array ( [id] => 16516088 [patent_doc_number] => 20200395346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/748061 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8047 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748061 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748061
Semiconductor package having logic semiconductor chip and memory packages on interposer Jan 20, 2020 Issued
Array ( [id] => 16272056 [patent_doc_number] => 20200273544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => METHOD FOR DETERMINING PROTONATION STATES OF PROTEIN ON BASIS OF CONSTANT-PH MOLECULAR DYNAMICS SIMULATION [patent_app_type] => utility [patent_app_number] => 16/740504 [patent_app_country] => US [patent_app_date] => 2020-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740504 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740504
METHOD FOR DETERMINING PROTONATION STATES OF PROTEIN ON BASIS OF CONSTANT-PH MOLECULAR DYNAMICS SIMULATION Jan 12, 2020 Abandoned
Array ( [id] => 16433101 [patent_doc_number] => 10833200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Techniques for forming vertical transport FET having gate stacks with a combination of work function metals [patent_app_type] => utility [patent_app_number] => 16/738756 [patent_app_country] => US [patent_app_date] => 2020-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16738756 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/738756
Techniques for forming vertical transport FET having gate stacks with a combination of work function metals Jan 8, 2020 Issued
Array ( [id] => 17319358 [patent_doc_number] => 20210408408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => OLED DISPLAY PANEL AND OLED DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/754320 [patent_app_country] => US [patent_app_date] => 2020-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16754320 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/754320
OLED display panel and OLED display device each having barrier layer between first and second flexible layers of substrate Jan 8, 2020 Issued
Array ( [id] => 18131514 [patent_doc_number] => 11557731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Organic light emitting diode having n-type host with narrow band gap and organic light emitting display device including the same [patent_app_type] => utility [patent_app_number] => 16/728273 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7903 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728273 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728273
Organic light emitting diode having n-type host with narrow band gap and organic light emitting display device including the same Dec 26, 2019 Issued
Array ( [id] => 19982032 [patent_doc_number] => 12349535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Light-emitting device and display device having first and second adhesive layers of different shear modulus [patent_app_type] => utility [patent_app_number] => 17/783829 [patent_app_country] => US [patent_app_date] => 2019-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3607 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17783829 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/783829
Light-emitting device and display device having first and second adhesive layers of different shear modulus Dec 25, 2019 Issued
Array ( [id] => 16873865 [patent_doc_number] => 20210167332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/047750 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17047750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/047750
Array substrate having resonant cavity formed by reflective layer and cathode, manufacturing method thereof and display device Dec 22, 2019 Issued
Array ( [id] => 16905364 [patent_doc_number] => 20210184280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => EQUIPMENT AND METHOD FOR INSPECTING SECONDARY BATTERY [patent_app_type] => utility [patent_app_number] => 17/257167 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7240 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17257167 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/257167
Equipment and method for inspecting secondary battery Dec 22, 2019 Issued
Array ( [id] => 16163141 [patent_doc_number] => 20200219803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => UNIFORM VIA PAD STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/724247 [patent_app_country] => US [patent_app_date] => 2019-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724247 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724247
Uniform via pad structure having covered traces between partially covered pads Dec 20, 2019 Issued
Array ( [id] => 16920505 [patent_doc_number] => 20210193597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => PACKAGE-INTEGRATED BISTABLE SWITCH FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION [patent_app_type] => utility [patent_app_number] => 16/721603 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721603 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721603
Package-integrated bistable switch for electrostatic discharge (ESD) protection Dec 18, 2019 Issued
Array ( [id] => 18141552 [patent_doc_number] => 20230015395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => DISPLAY DEVICE USING SEMICONDUCTOR LIGHT-EMITTING ELEMENT, AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/780880 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17780880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/780880
Display device using semiconductor light-emitting element seated in plurality of cells of barrier rib portion Dec 17, 2019 Issued
Array ( [id] => 17530186 [patent_doc_number] => 11302887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Organic electroluminescent diode device having light-emitting layer disposed on electron injection layer, display panel, and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/626735 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3548 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16626735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/626735
Organic electroluminescent diode device having light-emitting layer disposed on electron injection layer, display panel, and manufacturing method thereof Dec 17, 2019 Issued
Array ( [id] => 19108825 [patent_doc_number] => 11961940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Optoelectronic device with PN junction and trench gate [patent_app_type] => utility [patent_app_number] => 17/309766 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4837 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17309766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/309766
Optoelectronic device with PN junction and trench gate Dec 17, 2019 Issued
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