Sam Silverberg

Array ( [id] => 11057364 [patent_doc_number] => 20160254326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'OLED DISPLAY SUBSTRATE, OLED DISPLAY DEVICE, AND MASK' [patent_app_type] => utility [patent_app_number] => 14/768504 [patent_app_country] => US [patent_app_date] => 2015-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3716 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14768504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10270304 [patent_doc_number] => 20150155301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'SEMICONDUCTOR SUBSTRATE WITH MULTIPLE SiGe REGIONS HAVING DIFFERENT GERMANIUM CONCENTRATIONS BY A SINGLE EPITAXY PROCESS' [patent_app_type] => utility [patent_app_number] => 14/595311 [patent_app_country] => US [patent_app_date] => 2015-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4980 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14595311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11510275 [patent_doc_number] => 09601442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Half-mold type mold package' [patent_app_type] => utility [patent_app_number] => 15/104255 [patent_app_country] => US [patent_app_date] => 2015-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5122 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15104255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10158824 [patent_doc_number] => 09190608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Method for fabricating semiconductor device having magnetic tunnel junction layer patterned using etching gas containing oxygen' [patent_app_type] => utility [patent_app_number] => 14/581554 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3761 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10984219 [patent_doc_number] => 20160181164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'FIN FORMATION ON AN INSULATING LAYER' [patent_app_type] => utility [patent_app_number] => 14/575602 [patent_app_country] => US [patent_app_date] => 2014-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14575602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13283369 [patent_doc_number] => 10153276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Group III heterojunction semiconductor device having silicon carbide-containing lateral diode [patent_app_type] => utility [patent_app_number] => 14/573062 [patent_app_country] => US [patent_app_date] => 2014-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6987 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14573062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12047474 [patent_doc_number] => 09825083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Optical detector with photodiode array having avalanche photodiodes connected to quenching resistors' [patent_app_type] => utility [patent_app_number] => 15/104359 [patent_app_country] => US [patent_app_date] => 2014-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7779 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15104359 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10826070 [patent_doc_number] => 20160172238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'SELECTIVE SEALANT REMOVAL' [patent_app_type] => utility [patent_app_number] => 14/569301 [patent_app_country] => US [patent_app_date] => 2014-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4254 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14569301 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10817663 [patent_doc_number] => 20160163826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'FINFET WITH WIDE UNMERGED SOURCE DRAIN EPI' [patent_app_type] => utility [patent_app_number] => 14/564323 [patent_app_country] => US [patent_app_date] => 2014-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4752 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14564323 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11333783 [patent_doc_number] => 09525035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Vertical high-voltage MOS transistor and method of forming the same' [patent_app_type] => utility [patent_app_number] => 14/563706 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 56 [patent_no_of_words] => 8584 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10184861 [patent_doc_number] => 09214545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Dual gate oxide trench MOSFET with channel stop trench' [patent_app_type] => utility [patent_app_number] => 14/563974 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 64 [patent_no_of_words] => 8132 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11221544 [patent_doc_number] => 09449887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Method of forming replacement gate PFET having TiALCO layer for improved NBTI performance' [patent_app_type] => utility [patent_app_number] => 14/563009 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11253069 [patent_doc_number] => 09478583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Wearable display having an array of LEDs on a conformable silicon substrate' [patent_app_type] => utility [patent_app_number] => 14/563772 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 41 [patent_no_of_words] => 11936 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11637865 [patent_doc_number] => 09659850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Package substrate comprising capacitor, redistribution layer and discrete coaxial connection' [patent_app_type] => utility [patent_app_number] => 14/563854 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 10495 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10802876 [patent_doc_number] => 20160149033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'INCREASING BREAKDOWN VOLTAGE OF LDMOS DEVICES FOR FOUNDRY PROCESSES' [patent_app_type] => utility [patent_app_number] => 14/562654 [patent_app_country] => US [patent_app_date] => 2014-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4761 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14562654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11227469 [patent_doc_number] => 09455195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-27 [patent_title] => 'Method of forming performance optimized gate structures by silicidizing lowered source and drain regions' [patent_app_type] => utility [patent_app_number] => 14/561550 [patent_app_country] => US [patent_app_date] => 2014-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3219 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14561550 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11194284 [patent_doc_number] => 09425103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-23 [patent_title] => 'Methods of using a metal protection layer to form replacement gate structures for semiconductor devices' [patent_app_type] => utility [patent_app_number] => 14/560102 [patent_app_country] => US [patent_app_date] => 2014-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5881 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14560102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11057360 [patent_doc_number] => 20160254322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/769080 [patent_app_country] => US [patent_app_date] => 2014-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7062 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14769080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11051070 [patent_doc_number] => 20160248030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'ORGANIC ELECTROLUMINESCENT DISPLAY DEIVCE, A FABRICATING METHOD THEREOF AND A DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/768851 [patent_app_country] => US [patent_app_date] => 2014-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4426 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14768851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10611098 [patent_doc_number] => 09331143 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-03 [patent_title] => 'Semiconductor structure having field plates over resurf regions in semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 14/548319 [patent_app_country] => US [patent_app_date] => 2014-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3265 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14548319 [rel_patent_id] =>[rel_patent_doc_number] =>)