Sam Silverberg

Array ( [id] => 8742674 [patent_doc_number] => 20130082391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS' [patent_app_type] => utility [patent_app_number] => 13/440290 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17322 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8742673 [patent_doc_number] => 20130082390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS' [patent_app_type] => utility [patent_app_number] => 13/440280 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 24745 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440280 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8742679 [patent_doc_number] => 20130082396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS' [patent_app_type] => utility [patent_app_number] => 13/440199 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 24885 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8742678 [patent_doc_number] => 20130082395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'STUB MINIMIZATION USING DUPLICATE SETS OF SIGNAL TERMINALS IN ASSEMBLIES WITHOUT WIREBONDS TO PACKAGE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/439317 [patent_app_country] => US [patent_app_date] => 2012-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 22698 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13439317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8742657 [patent_doc_number] => 20130082374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'STUB MINIMIZATION USING DUPLICATE SETS OF SIGNAL TERMINALS IN ASSEMBLIES WITHOUT WIREBONDS TO PACKAGE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/439228 [patent_app_country] => US [patent_app_date] => 2012-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 23045 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13439228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8310483 [patent_doc_number] => 20120187506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Metal High-K Transistor Having Silicon Sidewall For Reduced Parasitic Capacitance, and Process to Fabricate Same' [patent_app_type] => utility [patent_app_number] => 13/432395 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3971 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8277966 [patent_doc_number] => 20120171834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/419713 [patent_app_country] => US [patent_app_date] => 2012-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 14904 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13419713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9233382 [patent_doc_number] => 08598690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-03 [patent_title] => 'Semiconductor device having conductive vias in peripheral region connecting shielding layer to ground' [patent_app_type] => utility [patent_app_number] => 13/360549 [patent_app_country] => US [patent_app_date] => 2012-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 31 [patent_no_of_words] => 7218 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13360549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8192687 [patent_doc_number] => 20120119182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/357964 [patent_app_country] => US [patent_app_date] => 2012-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4596 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119182.pdf [firstpage_image] =>[orig_patent_app_number] => 13357964 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10118506 [patent_doc_number] => 09153394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Method for fabricating a microswitch actuatable by a magnetic field' [patent_app_type] => utility [patent_app_number] => 13/340785 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 4817 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340785 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9676743 [patent_doc_number] => 08815651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Method for manufacturing an electronic device by reducing thickness of electronic members attached to a carrier' [patent_app_type] => utility [patent_app_number] => 13/340770 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 6851 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8615340 [patent_doc_number] => 20130020652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'METHOD FOR SUPPRESSING SHORT CHANNEL EFFECT OF CMOS DEVICE' [patent_app_type] => utility [patent_app_number] => 13/339429 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4517 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8680835 [patent_doc_number] => 20130049119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'MULTI-WORKING VOLTAGES CMOS DEVICE WITH SINGLE GATE OXIDE LAYER THICKNESS AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/339438 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339438 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8901269 [patent_doc_number] => 20130168772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'SEMICONDUCTOR DEVICE FOR ELECTROSTATIC DISCHARGE PROTECTING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/338324 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2443 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13338324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8901283 [patent_doc_number] => 20130168786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'MAGNETIC SHIFT REGISTER WITH PINNING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/338285 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3058 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13338285 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8344859 [patent_doc_number] => 20120205779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING CAPACITORS AND METAL CONTACTS, AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/337481 [patent_app_country] => US [patent_app_date] => 2011-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7390 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8717949 [patent_doc_number] => 20130069166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/337443 [patent_app_country] => US [patent_app_date] => 2011-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5613 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337443 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8789009 [patent_doc_number] => 20130105978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'SILICON SUBMOUNT FOR LIGHT EMITTING DIODE AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/337159 [patent_app_country] => US [patent_app_date] => 2011-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3161 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337159 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9889497 [patent_doc_number] => 08975758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Semiconductor package having interposer with openings containing conductive layer' [patent_app_type] => utility [patent_app_number] => 13/337197 [patent_app_country] => US [patent_app_date] => 2011-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3835 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8615295 [patent_doc_number] => 20130020607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'LED MODULE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/337127 [patent_app_country] => US [patent_app_date] => 2011-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1167 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337127 [rel_patent_id] =>[rel_patent_doc_number] =>)