Search

Sam Silverberg

Examiner (ID: 4104)

Most Active Art Unit
1502
Art Unit(s)
1308, 1309, 1101, 1742, 1502, 1311, 1733, 1102, 1305, 1304
Total Applications
1075
Issued Applications
889
Pending Applications
40
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6417305 [patent_doc_number] => 20100276787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'Wafer Backside Structures Having Copper Pillars' [patent_app_type] => utility [patent_app_number] => 12/708287 [patent_app_country] => US [patent_app_date] => 2010-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2912 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20100276787.pdf [firstpage_image] =>[orig_patent_app_number] => 12708287 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/708287
Wafer backside structures having copper pillars Feb 17, 2010 Issued
Array ( [id] => 9239806 [patent_doc_number] => 08604601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Semiconductor device having wiring layers with power-supply plane and ground plane' [patent_app_type] => utility [patent_app_number] => 12/708320 [patent_app_country] => US [patent_app_date] => 2010-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 6544 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12708320 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/708320
Semiconductor device having wiring layers with power-supply plane and ground plane Feb 17, 2010 Issued
Array ( [id] => 8994873 [patent_doc_number] => 08518757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Method of fabricating strained semiconductor structures from silicon-on-insulator (SOI)' [patent_app_type] => utility [patent_app_number] => 12/707975 [patent_app_country] => US [patent_app_date] => 2010-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 4335 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12707975 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/707975
Method of fabricating strained semiconductor structures from silicon-on-insulator (SOI) Feb 17, 2010 Issued
Array ( [id] => 9469539 [patent_doc_number] => 08723172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Display device, thin film transistor array substrate and thin film transistor having oxide semiconductor' [patent_app_type] => utility [patent_app_number] => 12/699058 [patent_app_country] => US [patent_app_date] => 2010-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3254 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12699058 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/699058
Display device, thin film transistor array substrate and thin film transistor having oxide semiconductor Feb 2, 2010 Issued
Array ( [id] => 7706406 [patent_doc_number] => 20120001173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'FLEXIBLE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 13/256457 [patent_app_country] => US [patent_app_date] => 2010-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 16289 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13256457 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/256457
Flexible semiconductor device having gate electrode disposed within an opening of a resin film Feb 1, 2010 Issued
Array ( [id] => 7702879 [patent_doc_number] => 08088633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-03 [patent_title] => 'Optical alignment methods for forming LEDs having a rough surface' [patent_app_type] => utility [patent_app_number] => 12/592735 [patent_app_country] => US [patent_app_date] => 2009-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4675 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/088/08088633.pdf [firstpage_image] =>[orig_patent_app_number] => 12592735 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/592735
Optical alignment methods for forming LEDs having a rough surface Dec 1, 2009 Issued
Array ( [id] => 8571577 [patent_doc_number] => 08338221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Method for manufacturing thin film type solar cell' [patent_app_type] => utility [patent_app_number] => 12/628215 [patent_app_country] => US [patent_app_date] => 2009-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5578 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12628215 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/628215
Method for manufacturing thin film type solar cell Nov 30, 2009 Issued
Array ( [id] => 8294269 [patent_doc_number] => 08222052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Method for growth of dilute-nitride materials using an isotope for enhancing the sensitivity of resonant nuclear reation analysis' [patent_app_type] => utility [patent_app_number] => 12/628675 [patent_app_country] => US [patent_app_date] => 2009-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4457 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12628675 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/628675
Method for growth of dilute-nitride materials using an isotope for enhancing the sensitivity of resonant nuclear reation analysis Nov 30, 2009 Issued
Array ( [id] => 6001879 [patent_doc_number] => 20110117718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'METHOD OF FORMING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/627555 [patent_app_country] => US [patent_app_date] => 2009-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 23253 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20110117718.pdf [firstpage_image] =>[orig_patent_app_number] => 12627555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/627555
METHOD OF FORMING SEMICONDUCTOR DEVICE Nov 29, 2009 Abandoned
Array ( [id] => 6518652 [patent_doc_number] => 20100123183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/622816 [patent_app_country] => US [patent_app_date] => 2009-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11481 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123183.pdf [firstpage_image] =>[orig_patent_app_number] => 12622816 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/622816
Method of fabricating non-volatile semiconductor memory device by using plasma film-forming method and plasma nitridation Nov 19, 2009 Issued
Array ( [id] => 7506777 [patent_doc_number] => 20110254131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/129484 [patent_app_country] => US [patent_app_date] => 2009-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5054 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254131.pdf [firstpage_image] =>[orig_patent_app_number] => 13129484 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/129484
Semiconductor integrated circuit device having analog circuit separated from digital circuit using resistive and capacitive element regions Oct 29, 2009 Issued
Array ( [id] => 6215862 [patent_doc_number] => 20100051995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING APPARATUS AND SEMICONDUCTOR LIGHT EMITTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/549048 [patent_app_country] => US [patent_app_date] => 2009-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20100051995.pdf [firstpage_image] =>[orig_patent_app_number] => 12549048 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/549048
Semiconductor light emitting apparatus having stacked reflective dielectric films Aug 26, 2009 Issued
Array ( [id] => 8701915 [patent_doc_number] => 08395138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Nonvolatile semiconductor memory having buffer layer containing nitrogen and containing carbon as main component' [patent_app_type] => utility [patent_app_number] => 12/545326 [patent_app_country] => US [patent_app_date] => 2009-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 8028 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12545326 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/545326
Nonvolatile semiconductor memory having buffer layer containing nitrogen and containing carbon as main component Aug 20, 2009 Issued
Array ( [id] => 6067836 [patent_doc_number] => 20110042793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'LEAD FRAME ASSEMBLY FOR A SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/545075 [patent_app_country] => US [patent_app_date] => 2009-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4729 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20110042793.pdf [firstpage_image] =>[orig_patent_app_number] => 12545075 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/545075
LEAD FRAME ASSEMBLY FOR A SEMICONDUCTOR PACKAGE Aug 20, 2009 Abandoned
Array ( [id] => 6067774 [patent_doc_number] => 20110042759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'SWITCHING DEVICE HAVING A MOLYBDENUM OXYNITRIDE METAL GATE' [patent_app_type] => utility [patent_app_number] => 12/545343 [patent_app_country] => US [patent_app_date] => 2009-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2045 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20110042759.pdf [firstpage_image] =>[orig_patent_app_number] => 12545343 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/545343
SWITCHING DEVICE HAVING A MOLYBDENUM OXYNITRIDE METAL GATE Aug 20, 2009 Abandoned
Array ( [id] => 5364837 [patent_doc_number] => 20090302396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Structure and Method to Fabricate Metal Gate High-K Devices' [patent_app_type] => utility [patent_app_number] => 12/542855 [patent_app_country] => US [patent_app_date] => 2009-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3455 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302396.pdf [firstpage_image] =>[orig_patent_app_number] => 12542855 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/542855
Metal gate high-K devices having a layer comprised of amorphous silicon Aug 17, 2009 Issued
Array ( [id] => 7530784 [patent_doc_number] => 07843007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Metal high-k transistor having silicon sidewall for reduced parasitic capacitance' [patent_app_type] => utility [patent_app_number] => 12/539842 [patent_app_country] => US [patent_app_date] => 2009-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2696 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/843/07843007.pdf [firstpage_image] =>[orig_patent_app_number] => 12539842 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/539842
Metal high-k transistor having silicon sidewall for reduced parasitic capacitance Aug 11, 2009 Issued
Array ( [id] => 5303623 [patent_doc_number] => 20090298275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'Metal High-K Transistor Having Silicon Sidewall For Reduced Parasitic Capacitance, And Process To Fabricate Same' [patent_app_type] => utility [patent_app_number] => 12/539860 [patent_app_country] => US [patent_app_date] => 2009-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2666 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20090298275.pdf [firstpage_image] =>[orig_patent_app_number] => 12539860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/539860
Method to reduce parastic capacitance in a metal high dielectric constant (MHK) transistor Aug 11, 2009 Issued
Array ( [id] => 8625427 [patent_doc_number] => 08357921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Integrated three-dimensional semiconductor system comprising nonvolatile nanotube field effect transistors' [patent_app_type] => utility [patent_app_number] => 12/536817 [patent_app_country] => US [patent_app_date] => 2009-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 105 [patent_figures_cnt] => 136 [patent_no_of_words] => 86265 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12536817 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/536817
Integrated three-dimensional semiconductor system comprising nonvolatile nanotube field effect transistors Aug 5, 2009 Issued
Array ( [id] => 5394978 [patent_doc_number] => 20090315041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'OPTICAL MEMBER AND METHOD FOR MANUFACTURING OF OPTICAL MEMBER' [patent_app_type] => utility [patent_app_number] => 12/478828 [patent_app_country] => US [patent_app_date] => 2009-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4112 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20090315041.pdf [firstpage_image] =>[orig_patent_app_number] => 12478828 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/478828
Optical member having photocurable resin and method for manufacturing the optical member Jun 4, 2009 Issued
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