Search

Sam Silverberg

Examiner (ID: 4104)

Most Active Art Unit
1502
Art Unit(s)
1308, 1309, 1101, 1742, 1502, 1311, 1733, 1102, 1305, 1304
Total Applications
1075
Issued Applications
889
Pending Applications
40
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10158710 [patent_doc_number] => 09190494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Systems and devices including fin field-effect transistors each having U-shaped semiconductor fin' [patent_app_type] => utility [patent_app_number] => 12/033799 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 4455 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12033799 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/033799
Systems and devices including fin field-effect transistors each having U-shaped semiconductor fin Feb 18, 2008 Issued
Array ( [id] => 4873273 [patent_doc_number] => 20080200007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'Methods of forming semiconductor devices' [patent_app_type] => utility [patent_app_number] => 12/070220 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3270 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20080200007.pdf [firstpage_image] =>[orig_patent_app_number] => 12070220 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/070220
Methods of forming semiconductor devices including multistage planarization and crystalization of a semiconductor layer Feb 14, 2008 Issued
Array ( [id] => 4432552 [patent_doc_number] => 07897424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Method of manufacturing an electrical-mechanical memory device' [patent_app_type] => utility [patent_app_number] => 12/069772 [patent_app_country] => US [patent_app_date] => 2008-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 37 [patent_no_of_words] => 11452 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/897/07897424.pdf [firstpage_image] =>[orig_patent_app_number] => 12069772 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/069772
Method of manufacturing an electrical-mechanical memory device Feb 12, 2008 Issued
Array ( [id] => 4829295 [patent_doc_number] => 20080128812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'DUAL WIRED INTEGRATED CIRCUIT CHIPS' [patent_app_type] => utility [patent_app_number] => 12/029589 [patent_app_country] => US [patent_app_date] => 2008-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4944 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20080128812.pdf [firstpage_image] =>[orig_patent_app_number] => 12029589 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/029589
Dual wired integrated circuit chips Feb 11, 2008 Issued
Array ( [id] => 6600910 [patent_doc_number] => 20100032831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-11 [patent_title] => 'BUMP STRUCTURE FOE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/517555 [patent_app_country] => US [patent_app_date] => 2008-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2888 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20100032831.pdf [firstpage_image] =>[orig_patent_app_number] => 12517555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/517555
BUMP STRUCTURE FOE SEMICONDUCTOR DEVICE Feb 11, 2008 Abandoned
Array ( [id] => 7811675 [patent_doc_number] => 08134207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-13 [patent_title] => 'High breakdown voltage semiconductor circuit device' [patent_app_type] => utility [patent_app_number] => 12/028157 [patent_app_country] => US [patent_app_date] => 2008-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 7261 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/134/08134207.pdf [firstpage_image] =>[orig_patent_app_number] => 12028157 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/028157
High breakdown voltage semiconductor circuit device Feb 7, 2008 Issued
Array ( [id] => 6633705 [patent_doc_number] => 20100173474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR CHIP' [patent_app_type] => utility [patent_app_number] => 12/160482 [patent_app_country] => US [patent_app_date] => 2008-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6974 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20100173474.pdf [firstpage_image] =>[orig_patent_app_number] => 12160482 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/160482
Method of manufacturing semiconductor chip using laser light and plasma dicing Feb 6, 2008 Issued
Array ( [id] => 4723990 [patent_doc_number] => 20080203531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/024140 [patent_app_country] => US [patent_app_date] => 2008-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3625 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20080203531.pdf [firstpage_image] =>[orig_patent_app_number] => 12024140 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/024140
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Jan 31, 2008 Abandoned
Array ( [id] => 4952644 [patent_doc_number] => 20080185668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/007819 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20080185668.pdf [firstpage_image] =>[orig_patent_app_number] => 12007819 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/007819
Method of fabricating a multi-bit electro-mechanical memory device Jan 15, 2008 Issued
Array ( [id] => 4904063 [patent_doc_number] => 20080113476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'DUAL-PLANE COMPLEMENTARY METAL OXIDE SEMICONDUCTOR' [patent_app_type] => utility [patent_app_number] => 12/014850 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4652 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20080113476.pdf [firstpage_image] =>[orig_patent_app_number] => 12014850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014850
Method of forming a dual-plane complementary metal oxide semiconductor Jan 15, 2008 Issued
Array ( [id] => 5340657 [patent_doc_number] => 20090179307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'INTEGRATED CIRCUIT SYSTEM EMPLOYING FEED-FORWARD CONTROL' [patent_app_type] => utility [patent_app_number] => 12/014448 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4974 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20090179307.pdf [firstpage_image] =>[orig_patent_app_number] => 12014448 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014448
INTEGRATED CIRCUIT SYSTEM EMPLOYING FEED-FORWARD CONTROL Jan 14, 2008 Abandoned
Array ( [id] => 5288148 [patent_doc_number] => 20090020878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/014600 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4125 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20090020878.pdf [firstpage_image] =>[orig_patent_app_number] => 12014600 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014600
SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME Jan 14, 2008 Abandoned
Array ( [id] => 5340582 [patent_doc_number] => 20090179232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'LOW LAG TRANSFER GATE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/013817 [patent_app_country] => US [patent_app_date] => 2008-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8963 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20090179232.pdf [firstpage_image] =>[orig_patent_app_number] => 12013817 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/013817
Low lag transfer gate device Jan 13, 2008 Issued
Array ( [id] => 4715301 [patent_doc_number] => 20080237823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Aluminum Based Bonding of Semiconductor Wafers' [patent_app_type] => utility [patent_app_number] => 12/013310 [patent_app_country] => US [patent_app_date] => 2008-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4497 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237823.pdf [firstpage_image] =>[orig_patent_app_number] => 12013310 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/013310
Aluminum Based Bonding of Semiconductor Wafers Jan 10, 2008 Abandoned
Array ( [id] => 4564308 [patent_doc_number] => 07838958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Semiconductor on-chip repair scheme for negative bias temperature instability' [patent_app_type] => utility [patent_app_number] => 11/971937 [patent_app_country] => US [patent_app_date] => 2008-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3645 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/838/07838958.pdf [firstpage_image] =>[orig_patent_app_number] => 11971937 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/971937
Semiconductor on-chip repair scheme for negative bias temperature instability Jan 9, 2008 Issued
Array ( [id] => 5573074 [patent_doc_number] => 20090140435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF PROTOTYPING A SEMICONDUCTOR CHIP' [patent_app_type] => utility [patent_app_number] => 11/966750 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3907 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20090140435.pdf [firstpage_image] =>[orig_patent_app_number] => 11966750 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/966750
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF PROTOTYPING A SEMICONDUCTOR CHIP Dec 27, 2007 Abandoned
Array ( [id] => 5288069 [patent_doc_number] => 20090020799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/005869 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9219 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20090020799.pdf [firstpage_image] =>[orig_patent_app_number] => 12005869 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/005869
Semiconductor device having multiple storage regions Dec 27, 2007 Issued
Array ( [id] => 5582678 [patent_doc_number] => 20090101880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'PHASE CHANGE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/964618 [patent_app_country] => US [patent_app_date] => 2007-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3822 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20090101880.pdf [firstpage_image] =>[orig_patent_app_number] => 11964618 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/964618
PHASE CHANGE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME Dec 25, 2007 Abandoned
Array ( [id] => 5499222 [patent_doc_number] => 20090159910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'LIGHT EMITTING DIODE STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/963558 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2721 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20090159910.pdf [firstpage_image] =>[orig_patent_app_number] => 11963558 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/963558
Method for fabricating light emitting diode structure having irregular serrations Dec 20, 2007 Issued
Array ( [id] => 4852373 [patent_doc_number] => 20080318115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'FLOW CHANNEL PLATE' [patent_app_type] => utility [patent_app_number] => 11/962113 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3474 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318115.pdf [firstpage_image] =>[orig_patent_app_number] => 11962113 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/962113
FLOW CHANNEL PLATE Dec 20, 2007 Abandoned
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