Samantha Moon
Examiner (ID: 8922)
Most Active Art Unit | 3746 |
Art Unit(s) | 3746 |
Total Applications | 6 |
Issued Applications | 6 |
Pending Applications | 0 |
Abandoned Applications | 0 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6927564
[patent_doc_number] => 20050240821
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Hard drive reset cache'
[patent_app_type] => utility
[patent_app_number] => 10/821578
[patent_app_country] => US
[patent_app_date] => 2004-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6144
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0240/20050240821.pdf
[firstpage_image] =>[orig_patent_app_number] => 10821578
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/821578 | Hard drive reset cache | Apr 8, 2004 | Issued |
Array
(
[id] => 6927496
[patent_doc_number] => 20050240753
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Supporting different instruction set architectures during run time'
[patent_app_type] => utility
[patent_app_number] => 10/819788
[patent_app_country] => US
[patent_app_date] => 2004-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1761
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0240/20050240753.pdf
[firstpage_image] =>[orig_patent_app_number] => 10819788
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/819788 | Supporting different instruction set architectures during run time | Apr 6, 2004 | Issued |
Array
(
[id] => 7449304
[patent_doc_number] => 20040268110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-30
[patent_title] => 'Setup support system, physical access driver, and setup support method'
[patent_app_type] => new
[patent_app_number] => 10/814299
[patent_app_country] => US
[patent_app_date] => 2004-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3776
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0268/20040268110.pdf
[firstpage_image] =>[orig_patent_app_number] => 10814299
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/814299 | Setup support system, physical access driver, and setup support method | Mar 31, 2004 | Issued |
Array
(
[id] => 7021585
[patent_doc_number] => 20050223206
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-06
[patent_title] => 'Memory modules having accurate operating current values stored thereon and methods for fabricating and implementing such devices'
[patent_app_type] => utility
[patent_app_number] => 10/816239
[patent_app_country] => US
[patent_app_date] => 2004-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4263
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0223/20050223206.pdf
[firstpage_image] =>[orig_patent_app_number] => 10816239
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/816239 | Memory modules having accurate operating current values stored thereon and methods for fabricating and implementing such devices | Mar 31, 2004 | Issued |
Array
(
[id] => 7339720
[patent_doc_number] => 20040246033
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-09
[patent_title] => 'Synchronizer signal generator device and process for generating a synchronizer signal'
[patent_app_type] => new
[patent_app_number] => 10/801130
[patent_app_country] => US
[patent_app_date] => 2004-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4638
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0246/20040246033.pdf
[firstpage_image] =>[orig_patent_app_number] => 10801130
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/801130 | Synchronizer signal generator device and process for generating a synchronizer signal | Mar 15, 2004 | Abandoned |
Array
(
[id] => 7457650
[patent_doc_number] => 20040187042
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'Printing apparatus and power supply control method in printing apparatus'
[patent_app_type] => new
[patent_app_number] => 10/800662
[patent_app_country] => US
[patent_app_date] => 2004-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 11521
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0187/20040187042.pdf
[firstpage_image] =>[orig_patent_app_number] => 10800662
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/800662 | Printing apparatus and power supply control method in printing apparatus | Mar 15, 2004 | Issued |
Array
(
[id] => 7175878
[patent_doc_number] => 20040201405
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-14
[patent_title] => 'Topology for providing clock signals to multiple circuit units on a circuit module'
[patent_app_type] => new
[patent_app_number] => 10/797941
[patent_app_country] => US
[patent_app_date] => 2004-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4035
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0201/20040201405.pdf
[firstpage_image] =>[orig_patent_app_number] => 10797941
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/797941 | Topology for providing clock signals to multiple circuit units on a circuit module | Mar 10, 2004 | Abandoned |
Array
(
[id] => 864275
[patent_doc_number] => 07373541
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-05-13
[patent_title] => 'Alignment signal control apparatus and method for operating the same'
[patent_app_type] => utility
[patent_app_number] => 10/800048
[patent_app_country] => US
[patent_app_date] => 2004-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3415
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/373/07373541.pdf
[firstpage_image] =>[orig_patent_app_number] => 10800048
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/800048 | Alignment signal control apparatus and method for operating the same | Mar 10, 2004 | Issued |
Array
(
[id] => 604886
[patent_doc_number] => 07434042
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-07
[patent_title] => 'Apparatus, method and recording medium for starting up data processing system'
[patent_app_type] => utility
[patent_app_number] => 10/786054
[patent_app_country] => US
[patent_app_date] => 2004-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9125
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/434/07434042.pdf
[firstpage_image] =>[orig_patent_app_number] => 10786054
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/786054 | Apparatus, method and recording medium for starting up data processing system | Feb 25, 2004 | Issued |
Array
(
[id] => 7359186
[patent_doc_number] => 20040250143
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-09
[patent_title] => 'Microcomputer having power supply circuit switching low pass filter'
[patent_app_type] => new
[patent_app_number] => 10/786588
[patent_app_country] => US
[patent_app_date] => 2004-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4562
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0250/20040250143.pdf
[firstpage_image] =>[orig_patent_app_number] => 10786588
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/786588 | Microcomputer having power supply circuit switching low pass filter | Feb 25, 2004 | Abandoned |
Array
(
[id] => 825617
[patent_doc_number] => 07406608
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-29
[patent_title] => 'Fast and compact circuit for bus inversion'
[patent_app_type] => utility
[patent_app_number] => 10/771435
[patent_app_country] => US
[patent_app_date] => 2004-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6297
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/406/07406608.pdf
[firstpage_image] =>[orig_patent_app_number] => 10771435
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/771435 | Fast and compact circuit for bus inversion | Feb 4, 2004 | Issued |
Array
(
[id] => 414844
[patent_doc_number] => 07284141
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-16
[patent_title] => 'Method of and apparatus for measuring jitter and generating an eye diagram of a high speed data signal'
[patent_app_type] => utility
[patent_app_number] => 10/772521
[patent_app_country] => US
[patent_app_date] => 2004-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4929
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/284/07284141.pdf
[firstpage_image] =>[orig_patent_app_number] => 10772521
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/772521 | Method of and apparatus for measuring jitter and generating an eye diagram of a high speed data signal | Feb 4, 2004 | Issued |
Array
(
[id] => 6997211
[patent_doc_number] => 20050136989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Method and system for distributing power to networked devices'
[patent_app_type] => utility
[patent_app_number] => 10/734665
[patent_app_country] => US
[patent_app_date] => 2003-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4258
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20050136989.pdf
[firstpage_image] =>[orig_patent_app_number] => 10734665
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/734665 | Method and system for distributing power to networked devices | Dec 11, 2003 | Issued |
Array
(
[id] => 7100351
[patent_doc_number] => 20050132177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-16
[patent_title] => 'Detecting modifications made to code placed in memory by the POST BIOS'
[patent_app_type] => utility
[patent_app_number] => 10/734960
[patent_app_country] => US
[patent_app_date] => 2003-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4752
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0132/20050132177.pdf
[firstpage_image] =>[orig_patent_app_number] => 10734960
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/734960 | Detecting modifications made to code placed in memory by the POST BIOS | Dec 11, 2003 | Abandoned |
Array
(
[id] => 799057
[patent_doc_number] => 07428651
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-23
[patent_title] => 'Electronic circuit with asynchronous clocking of peripheral units'
[patent_app_type] => utility
[patent_app_number] => 10/723432
[patent_app_country] => US
[patent_app_date] => 2003-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5944
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/428/07428651.pdf
[firstpage_image] =>[orig_patent_app_number] => 10723432
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/723432 | Electronic circuit with asynchronous clocking of peripheral units | Nov 24, 2003 | Issued |
Array
(
[id] => 6941162
[patent_doc_number] => 20050114725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-26
[patent_title] => 'Calibrating an integrated circuit to an electronic device'
[patent_app_type] => utility
[patent_app_number] => 10/722350
[patent_app_country] => US
[patent_app_date] => 2003-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4858
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0114/20050114725.pdf
[firstpage_image] =>[orig_patent_app_number] => 10722350
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/722350 | Calibrating an integrated circuit to an electronic device | Nov 24, 2003 | Abandoned |
Array
(
[id] => 7107267
[patent_doc_number] => 20050108514
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-19
[patent_title] => 'Firmware emulation environment for developing, debugging, and testing firmware components including option ROMs'
[patent_app_type] => utility
[patent_app_number] => 10/713720
[patent_app_country] => US
[patent_app_date] => 2003-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4085
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20050108514.pdf
[firstpage_image] =>[orig_patent_app_number] => 10713720
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/713720 | Firmware emulation environment for developing, debugging, and testing firmware components including option ROMs | Nov 13, 2003 | Issued |
Array
(
[id] => 374962
[patent_doc_number] => 07475270
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-01-06
[patent_title] => 'System and method for waveform sampling'
[patent_app_type] => utility
[patent_app_number] => 10/699909
[patent_app_country] => US
[patent_app_date] => 2003-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 5655
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/475/07475270.pdf
[firstpage_image] =>[orig_patent_app_number] => 10699909
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/699909 | System and method for waveform sampling | Nov 2, 2003 | Issued |
Array
(
[id] => 6920018
[patent_doc_number] => 20050097373
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Automated intelligent configuration tool for power system protection and control and monitoring devices'
[patent_app_type] => utility
[patent_app_number] => 10/699920
[patent_app_country] => US
[patent_app_date] => 2003-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5102
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20050097373.pdf
[firstpage_image] =>[orig_patent_app_number] => 10699920
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/699920 | Automated intelligent configuration tool for power system protection and control and monitoring devices | Nov 2, 2003 | Abandoned |
Array
(
[id] => 7166859
[patent_doc_number] => 20050086464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Technique for system initial program load or boot-up of electronic devices and systems'
[patent_app_type] => utility
[patent_app_number] => 10/687234
[patent_app_country] => US
[patent_app_date] => 2003-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5603
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0086/20050086464.pdf
[firstpage_image] =>[orig_patent_app_number] => 10687234
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/687234 | Technique for system initial program load or boot-up of electronic devices and systems | Oct 15, 2003 | Issued |