
Samantha N. Wood
Examiner (ID: 6012, Phone: (571)272-6457 , Office: P/2915 )
| Most Active Art Unit | 2915 |
| Art Unit(s) | 2914, 2915 |
| Total Applications | 1312 |
| Issued Applications | 1235 |
| Pending Applications | 29 |
| Abandoned Applications | 58 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5688481
[patent_doc_number] => 20060286796
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[patent_kind] => A1
[patent_issue_date] => 2006-12-21
[patent_title] => 'Method of forming a contact in a flash memory device'
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[patent_app_number] => 11/157143
[patent_app_country] => US
[patent_app_date] => 2005-06-20
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Array
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[patent_issue_date] => 2009-03-24
[patent_title] => 'Image sensor fabrication method and structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/156794 | Image sensor fabrication method and structure | Jun 19, 2005 | Issued |
Array
(
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[patent_issue_date] => 2009-06-16
[patent_title] => 'Multi-state memory cell'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/138575 | Multi-state memory cell | May 25, 2005 | Issued |
Array
(
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[patent_issue_date] => 2011-10-04
[patent_title] => 'Method for determining time to failure of submicron metal interconnects'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/125063 | Double gated transistor and method of fabrication | May 8, 2005 | Issued |
Array
(
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[patent_title] => 'Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials'
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Array
(
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[patent_title] => 'Post bump passivation for soft error protection'
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Array
(
[id] => 606802
[patent_doc_number] => 07154169
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[patent_issue_date] => 2006-12-26
[patent_title] => 'Substrate for IC package'
[patent_app_type] => utility
[patent_app_number] => 11/109823
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/109823 | Substrate for IC package | Apr 19, 2005 | Issued |
Array
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[id] => 6909952
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[patent_title] => 'Method for manufacturing light emitting diode utilizing transparent substrate and metal bonding technology and structure thereof'
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Array
(
[id] => 548521
[patent_doc_number] => 07170156
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[patent_issue_date] => 2007-01-30
[patent_title] => 'Laminar multi-layer piezoelectric roll component'
[patent_app_type] => utility
[patent_app_number] => 11/099349
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/099349 | Laminar multi-layer piezoelectric roll component | Apr 3, 2005 | Issued |
Array
(
[id] => 5750963
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[patent_title] => 'SEMICONDUCTOR DEVICE FORMING METHOD AND STRUCTURE \nFOR RETARDING DOPANT-ENHANCED DIFFUSION'
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Array
(
[id] => 719927
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[patent_title] => 'De-fluorination of wafer surface and related structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/907463 | De-fluorination of wafer surface and related structure | Mar 31, 2005 | Issued |
Array
(
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[patent_title] => 'Structure and method to control underfill'
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Array
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/084133 | Method of dicing semiconductor wafer into chips, and apparatus using this method | Mar 20, 2005 | Issued |