Search

Samantha N. Wood

Examiner (ID: 6012, Phone: (571)272-6457 , Office: P/2915 )

Most Active Art Unit
2915
Art Unit(s)
2914, 2915
Total Applications
1312
Issued Applications
1235
Pending Applications
29
Abandoned Applications
58

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7198202 [patent_doc_number] => 20050051792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 10/934453 [patent_app_country] => US [patent_app_date] => 2004-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2473 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20050051792.pdf [firstpage_image] =>[orig_patent_app_number] => 10934453 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/934453
Semiconductor package Sep 6, 2004 Issued
Array ( [id] => 7253961 [patent_doc_number] => 20050142897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Method for forming polycrystalline silicon film' [patent_app_type] => utility [patent_app_number] => 10/934153 [patent_app_country] => US [patent_app_date] => 2004-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3972 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142897.pdf [firstpage_image] =>[orig_patent_app_number] => 10934153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/934153
Method for forming polycrystalline silicon film Sep 2, 2004 Issued
Array ( [id] => 5903407 [patent_doc_number] => 20060046356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Method for forming a circuit package having a thin substrate' [patent_app_type] => utility [patent_app_number] => 10/931104 [patent_app_country] => US [patent_app_date] => 2004-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1633 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046356.pdf [firstpage_image] =>[orig_patent_app_number] => 10931104 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/931104
Method for forming a circuit package having a thin substrate Aug 30, 2004 Abandoned
Array ( [id] => 448568 [patent_doc_number] => 07250350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Method and structure for integrated stacked capacitor formation' [patent_app_type] => utility [patent_app_number] => 10/927730 [patent_app_country] => US [patent_app_date] => 2004-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 4787 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/250/07250350.pdf [firstpage_image] =>[orig_patent_app_number] => 10927730 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/927730
Method and structure for integrated stacked capacitor formation Aug 26, 2004 Issued
Array ( [id] => 8876402 [patent_doc_number] => 08471369 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-25 [patent_title] => 'Method and apparatus for reducing plasma process induced damage in integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/912660 [patent_app_country] => US [patent_app_date] => 2004-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1657 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10912660 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/912660
Method and apparatus for reducing plasma process induced damage in integrated circuits Aug 4, 2004 Issued
Array ( [id] => 435867 [patent_doc_number] => 07262123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Methods of forming wire bonds for semiconductor constructions' [patent_app_type] => utility [patent_app_number] => 10/903348 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 5748 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/262/07262123.pdf [firstpage_image] =>[orig_patent_app_number] => 10903348 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/903348
Methods of forming wire bonds for semiconductor constructions Jul 28, 2004 Issued
Array ( [id] => 7094911 [patent_doc_number] => 20050127508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Solder bump structure for flip chip package and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/897124 [patent_app_country] => US [patent_app_date] => 2004-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3541 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20050127508.pdf [firstpage_image] =>[orig_patent_app_number] => 10897124 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/897124
Solder bump structure for flip chip package and method for manufacturing the same Jul 22, 2004 Abandoned
Array ( [id] => 673105 [patent_doc_number] => 07091622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Semiconductor device, ball grid array connection system, and method of making' [patent_app_type] => utility [patent_app_number] => 10/890184 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4428 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/091/07091622.pdf [firstpage_image] =>[orig_patent_app_number] => 10890184 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/890184
Semiconductor device, ball grid array connection system, and method of making Jul 13, 2004 Issued
Array ( [id] => 7022981 [patent_doc_number] => 20050017375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Ball grid array package substrate and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/885623 [patent_app_country] => US [patent_app_date] => 2004-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2205 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017375.pdf [firstpage_image] =>[orig_patent_app_number] => 10885623 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/885623
Ball grid array package substrate and method for manufacturing the same Jul 7, 2004 Abandoned
Array ( [id] => 710658 [patent_doc_number] => 07056772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Method for sealing semiconductor component' [patent_app_type] => utility [patent_app_number] => 10/885678 [patent_app_country] => US [patent_app_date] => 2004-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3821 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/056/07056772.pdf [firstpage_image] =>[orig_patent_app_number] => 10885678 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/885678
Method for sealing semiconductor component Jul 7, 2004 Issued
Array ( [id] => 7023257 [patent_doc_number] => 20050017651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Method of manufacturing electron-emitting device and method of manufacturing image display apparatus' [patent_app_type] => utility [patent_app_number] => 10/885803 [patent_app_country] => US [patent_app_date] => 2004-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15354 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017651.pdf [firstpage_image] =>[orig_patent_app_number] => 10885803 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/885803
Method of manufacturing electron-emitting device and method of manufacturing image display apparatus Jul 7, 2004 Issued
Array ( [id] => 6970562 [patent_doc_number] => 20050036272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Process for fabricating capacitor element' [patent_app_type] => utility [patent_app_number] => 10/882665 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5582 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20050036272.pdf [firstpage_image] =>[orig_patent_app_number] => 10882665 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882665
Process for fabricating capacitor element Jul 1, 2004 Issued
Array ( [id] => 393915 [patent_doc_number] => 07297608 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-11-20 [patent_title] => 'Method for controlling properties of conformal silica nanolaminates formed by rapid vapor deposition' [patent_app_type] => utility [patent_app_number] => 10/874696 [patent_app_country] => US [patent_app_date] => 2004-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5853 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/297/07297608.pdf [firstpage_image] =>[orig_patent_app_number] => 10874696 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/874696
Method for controlling properties of conformal silica nanolaminates formed by rapid vapor deposition Jun 21, 2004 Issued
Array ( [id] => 672072 [patent_doc_number] => 07091082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Semiconductor method and device' [patent_app_type] => utility [patent_app_number] => 10/861103 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 34 [patent_no_of_words] => 7566 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/091/07091082.pdf [firstpage_image] =>[orig_patent_app_number] => 10861103 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/861103
Semiconductor method and device Jun 3, 2004 Issued
Array ( [id] => 7338382 [patent_doc_number] => 20040245543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Method of fabricating vertical structure compound semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/861743 [patent_app_country] => US [patent_app_date] => 2004-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4686 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245543.pdf [firstpage_image] =>[orig_patent_app_number] => 10861743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/861743
Method of fabricating vertical structure compound semiconductor devices Jun 2, 2004 Issued
Array ( [id] => 7375625 [patent_doc_number] => 20040219720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Metal fuse for semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/856065 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3750 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20040219720.pdf [firstpage_image] =>[orig_patent_app_number] => 10856065 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/856065
Metal fuse for semiconductor devices May 27, 2004 Issued
Array ( [id] => 7154588 [patent_doc_number] => 20050026326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/843478 [patent_app_country] => US [patent_app_date] => 2004-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20050026326.pdf [firstpage_image] =>[orig_patent_app_number] => 10843478 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/843478
Manufacturing method of semiconductor device May 11, 2004 Abandoned
Array ( [id] => 6949775 [patent_doc_number] => 20050224869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Contact process and structure for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/820743 [patent_app_country] => US [patent_app_date] => 2004-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 1715 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224869.pdf [firstpage_image] =>[orig_patent_app_number] => 10820743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/820743
Contact process and structure for a semiconductor device Apr 8, 2004 Issued
Array ( [id] => 823995 [patent_doc_number] => 07405468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-29 [patent_title] => 'Plastic package and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/821173 [patent_app_country] => US [patent_app_date] => 2004-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 18488 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/405/07405468.pdf [firstpage_image] =>[orig_patent_app_number] => 10821173 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/821173
Plastic package and method of fabricating the same Apr 8, 2004 Issued
Array ( [id] => 7339310 [patent_doc_number] => 20040245903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Electron emitter, method for manufacturing the same, electro-optical device, and electronic apparatus' [patent_app_type] => new [patent_app_number] => 10/809203 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11127 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245903.pdf [firstpage_image] =>[orig_patent_app_number] => 10809203 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809203
Electron emitter, method for manufacturing the same, electro-optical device, and electronic apparatus Mar 24, 2004 Abandoned
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