
Samantha N. Wood
Examiner (ID: 6012, Phone: (571)272-6457 , Office: P/2915 )
| Most Active Art Unit | 2915 |
| Art Unit(s) | 2914, 2915 |
| Total Applications | 1312 |
| Issued Applications | 1235 |
| Pending Applications | 29 |
| Abandoned Applications | 58 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 668430
[patent_doc_number] => 07094671
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-22
[patent_title] => 'Transistor with shallow germanium implantation region in channel'
[patent_app_type] => utility
[patent_app_number] => 10/805720
[patent_app_country] => US
[patent_app_date] => 2004-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 8616
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/094/07094671.pdf
[firstpage_image] =>[orig_patent_app_number] => 10805720
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/805720 | Transistor with shallow germanium implantation region in channel | Mar 21, 2004 | Issued |
Array
(
[id] => 5619494
[patent_doc_number] => 20060189028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-24
[patent_title] => 'Wafer having alternating design structure and method for manufacturing semiconductor package using the same'
[patent_app_type] => utility
[patent_app_number] => 10/552333
[patent_app_country] => US
[patent_app_date] => 2004-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4224
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0189/20060189028.pdf
[firstpage_image] =>[orig_patent_app_number] => 10552333
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/552333 | Wafer having alternating design structure and method for manufacturing semiconductor package using the same | Mar 18, 2004 | Abandoned |
Array
(
[id] => 326589
[patent_doc_number] => 07514360
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Thermal robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof'
[patent_app_type] => utility
[patent_app_number] => 10/802563
[patent_app_country] => US
[patent_app_date] => 2004-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 2256
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/514/07514360.pdf
[firstpage_image] =>[orig_patent_app_number] => 10802563
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/802563 | Thermal robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof | Mar 16, 2004 | Issued |
Array
(
[id] => 7150177
[patent_doc_number] => 20040171240
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-02
[patent_title] => 'Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate'
[patent_app_type] => new
[patent_app_number] => 10/796514
[patent_app_country] => US
[patent_app_date] => 2004-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5740
[patent_no_of_claims] => 96
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20040171240.pdf
[firstpage_image] =>[orig_patent_app_number] => 10796514
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/796514 | Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate | Mar 8, 2004 | Abandoned |
Array
(
[id] => 690485
[patent_doc_number] => 07074683
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-07-11
[patent_title] => 'Semiconductor devices and methods of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/796754
[patent_app_country] => US
[patent_app_date] => 2004-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 6252
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/074/07074683.pdf
[firstpage_image] =>[orig_patent_app_number] => 10796754
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/796754 | Semiconductor devices and methods of fabricating the same | Mar 7, 2004 | Issued |
Array
(
[id] => 836908
[patent_doc_number] => 07393723
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-01
[patent_title] => 'Method of manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/793909
[patent_app_country] => US
[patent_app_date] => 2004-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 26
[patent_no_of_words] => 18222
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/393/07393723.pdf
[firstpage_image] =>[orig_patent_app_number] => 10793909
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/793909 | Method of manufacturing a semiconductor device | Mar 7, 2004 | Issued |
Array
(
[id] => 7006943
[patent_doc_number] => 20050172256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-04
[patent_title] => 'Mask set for measuring an overlapping error and method of measuring an overlapping error using the same'
[patent_app_type] => utility
[patent_app_number] => 10/793743
[patent_app_country] => US
[patent_app_date] => 2004-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1840
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0172/20050172256.pdf
[firstpage_image] =>[orig_patent_app_number] => 10793743
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/793743 | Mask set for measuring an overlapping error and method of measuring an overlapping error using the same | Mar 7, 2004 | Abandoned |
Array
(
[id] => 856715
[patent_doc_number] => 07374974
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-05-20
[patent_title] => 'Thyristor-based device with trench dielectric material'
[patent_app_type] => utility
[patent_app_number] => 10/794843
[patent_app_country] => US
[patent_app_date] => 2004-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5074
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/374/07374974.pdf
[firstpage_image] =>[orig_patent_app_number] => 10794843
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/794843 | Thyristor-based device with trench dielectric material | Mar 4, 2004 | Issued |
Array
(
[id] => 7442691
[patent_doc_number] => 20040185624
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'Semiconductor device and method for fabricating the same'
[patent_app_type] => new
[patent_app_number] => 10/765894
[patent_app_country] => US
[patent_app_date] => 2004-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7045
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20040185624.pdf
[firstpage_image] =>[orig_patent_app_number] => 10765894
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/765894 | Semiconductor device and method for fabricating the same | Jan 28, 2004 | Abandoned |
Array
(
[id] => 7323386
[patent_doc_number] => 20040251491
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'Trench MOSFET technology for DC-DC converter applications'
[patent_app_type] => new
[patent_app_number] => 10/766465
[patent_app_country] => US
[patent_app_date] => 2004-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 3860
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0251/20040251491.pdf
[firstpage_image] =>[orig_patent_app_number] => 10766465
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/766465 | Trench MOSFET technology for DC-DC converter applications | Jan 26, 2004 | Issued |
Array
(
[id] => 7207691
[patent_doc_number] => 20050166170
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'Field programmable platform array'
[patent_app_type] => utility
[patent_app_number] => 10/764803
[patent_app_country] => US
[patent_app_date] => 2004-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2479
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0166/20050166170.pdf
[firstpage_image] =>[orig_patent_app_number] => 10764803
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764803 | Field programmable platform array | Jan 25, 2004 | Abandoned |
Array
(
[id] => 6988703
[patent_doc_number] => 20050087816
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Manufacturing process for a flash memory and flash memory thus produced'
[patent_app_type] => utility
[patent_app_number] => 10/763044
[patent_app_country] => US
[patent_app_date] => 2004-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2458
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20050087816.pdf
[firstpage_image] =>[orig_patent_app_number] => 10763044
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/763044 | Manufacturing process for a flash memory and flash memory thus produced | Jan 21, 2004 | Issued |
Array
(
[id] => 7324105
[patent_doc_number] => 20040137650
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-15
[patent_title] => 'Method for measuring silicide proportion, method for measuring annealing temperature, method for fabricating semiconductor device and x-ray photo receiver'
[patent_app_type] => new
[patent_app_number] => 10/751893
[patent_app_country] => US
[patent_app_date] => 2004-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 12382
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20040137650.pdf
[firstpage_image] =>[orig_patent_app_number] => 10751893
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/751893 | Method for measuring silicide proportion, method for measuring annealing temperature, method for fabricating semiconductor device and x-ray photo receiver | Jan 6, 2004 | Issued |
Array
(
[id] => 7114342
[patent_doc_number] => 20050067642
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-31
[patent_title] => 'Process for fabrication of a ferrocapacitor'
[patent_app_type] => utility
[patent_app_number] => 10/673053
[patent_app_country] => US
[patent_app_date] => 2003-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1931
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0067/20050067642.pdf
[firstpage_image] =>[orig_patent_app_number] => 10673053
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/673053 | Process for fabrication of a ferrocapacitor | Sep 25, 2003 | Issued |