Search

Samir Wadie Rizk

Examiner (ID: 680, Phone: (571)272-8191 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133
Total Applications
1772
Issued Applications
1604
Pending Applications
23
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16714122 [patent_doc_number] => 20210081269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => CONTROLLER THAT RECEIVES A CYCLIC REDUNDANCY CHECK (CRC) CODE FOR BOTH READ AND WRITE DATA TRANSMITTED VIA BIDIRECTIONAL DATA LINK [patent_app_type] => utility [patent_app_number] => 17/068515 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/068515
Controller that receives a cyclic redundancy check (CRC) code for both read and write data transmitted via bidirectional data link Oct 11, 2020 Issued
Array ( [id] => 16561117 [patent_doc_number] => 20210006266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => INTEGRATED CIRCUIT FOR TRANSMISSION APPARATUS [patent_app_type] => utility [patent_app_number] => 17/029488 [patent_app_country] => US [patent_app_date] => 2020-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17029488 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/029488
Integrated circuit for transmission apparatus Sep 22, 2020 Issued
Array ( [id] => 16561204 [patent_doc_number] => 20210006353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => System and Method for Transferring Data and a Data Check Field [patent_app_type] => utility [patent_app_number] => 17/024191 [patent_app_country] => US [patent_app_date] => 2020-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17024191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/024191
System and method for transferring data and a data check field Sep 16, 2020 Issued
Array ( [id] => 17559802 [patent_doc_number] => 11316531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Parity puncturing device for fixed-length signaling information encoding, and parity puncturing method using same [patent_app_type] => utility [patent_app_number] => 17/021025 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9586 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/021025
Parity puncturing device for fixed-length signaling information encoding, and parity puncturing method using same Sep 14, 2020 Issued
Array ( [id] => 17941516 [patent_doc_number] => 11475975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Semiconductor memory device and method of operating the semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/018494 [patent_app_country] => US [patent_app_date] => 2020-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 12790 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17018494 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/018494
Semiconductor memory device and method of operating the semiconductor memory device Sep 10, 2020 Issued
Array ( [id] => 17544772 [patent_doc_number] => 11309913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Zero padding apparatus for encoding variable-length signaling information and zero padding method using same [patent_app_type] => utility [patent_app_number] => 17/016479 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9612 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016479 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016479
Zero padding apparatus for encoding variable-length signaling information and zero padding method using same Sep 9, 2020 Issued
Array ( [id] => 16661553 [patent_doc_number] => 20210058190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => BIT ERROR CORRECTION FOR WIRELESS RETRANSMISSION COMMUNICATIONS SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/013411 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013411 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/013411
Bit error correction for wireless retransmission communications systems Sep 3, 2020 Issued
Array ( [id] => 18196409 [patent_doc_number] => 20230049928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => MEMORY BUILT-IN SELF-TEST WITH AUTOMATED MULTIPLE STEP REFERENCE TRIMMING [patent_app_type] => utility [patent_app_number] => 17/757013 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17757013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/757013
Memory built-in self-test with automated multiple step reference trimming Aug 27, 2020 Issued
Array ( [id] => 17572907 [patent_doc_number] => 11321176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Reduced parity data management [patent_app_type] => utility [patent_app_number] => 17/004136 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8874 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004136 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004136
Reduced parity data management Aug 26, 2020 Issued
Array ( [id] => 16510073 [patent_doc_number] => 20200389329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => TRANSMISSION OF PULSE POWER AND DATA IN A COMMUNICATIONS NETWORK [patent_app_type] => utility [patent_app_number] => 16/999754 [patent_app_country] => US [patent_app_date] => 2020-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -39 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16999754 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/999754
Transmission of pulse power and data in a communications network Aug 20, 2020 Issued
Array ( [id] => 16529557 [patent_doc_number] => 20200403638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => DEVICES AND METHODS FOR GENERATING BLOCK PUNCTURED POLAR CODES [patent_app_type] => utility [patent_app_number] => 16/998290 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998290
Devices and methods for generating block punctured polar codes Aug 19, 2020 Issued
Array ( [id] => 17415840 [patent_doc_number] => 20220050744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => ERROR CACHING TECHNIQUES FOR IMPROVED ERROR CORRECTION IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/993956 [patent_app_country] => US [patent_app_date] => 2020-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993956 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/993956
Error caching techniques for improved error correction in a memory device Aug 13, 2020 Issued
Array ( [id] => 16472404 [patent_doc_number] => 20200373942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => ENCODING AND DECODING METHODS, APPARATUSES, AND DEVICES [patent_app_type] => utility [patent_app_number] => 16/993266 [patent_app_country] => US [patent_app_date] => 2020-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/993266
Encoding and decoding methods, apparatuses, and devices Aug 13, 2020 Issued
Array ( [id] => 17574920 [patent_doc_number] => 11323201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Apparatus and method for encoding and decoding channel in communication or broadcasting system [patent_app_type] => utility [patent_app_number] => 16/988926 [patent_app_country] => US [patent_app_date] => 2020-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 29617 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16988926 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/988926
Apparatus and method for encoding and decoding channel in communication or broadcasting system Aug 9, 2020 Issued
Array ( [id] => 16478224 [patent_doc_number] => 10853172 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Concatenating data objects for storage in a vast data storage network [patent_app_type] => utility [patent_app_number] => 16/988247 [patent_app_country] => US [patent_app_date] => 2020-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 70 [patent_no_of_words] => 43973 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16988247 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/988247
Concatenating data objects for storage in a vast data storage network Aug 6, 2020 Issued
Array ( [id] => 17786893 [patent_doc_number] => 11410019 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-09 [patent_title] => Verifying system registry files in a storage network [patent_app_type] => utility [patent_app_number] => 16/986599 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986599 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/986599
Verifying system registry files in a storage network Aug 5, 2020 Issued
Array ( [id] => 16625653 [patent_doc_number] => 20210044306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => PROCESSING OF DATA READ FROM A MEMORY [patent_app_type] => utility [patent_app_number] => 16/986300 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5093 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986300 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/986300
Processing of data read from a memory Aug 5, 2020 Issued
Array ( [id] => 16625729 [patent_doc_number] => 20210044382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => SECURITY MODULE FOR A SERIAL COMMUNICATIONS DEVICE [patent_app_type] => utility [patent_app_number] => 16/984699 [patent_app_country] => US [patent_app_date] => 2020-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16984699 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/984699
Security module for a serial communications device Aug 3, 2020 Issued
Array ( [id] => 17395715 [patent_doc_number] => 11244738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Multi-chip package [patent_app_type] => utility [patent_app_number] => 16/984383 [patent_app_country] => US [patent_app_date] => 2020-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16984383 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/984383
Multi-chip package Aug 3, 2020 Issued
Array ( [id] => 16844873 [patent_doc_number] => 11016962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Blockchain data storage based on shared nodes and error correction code [patent_app_type] => utility [patent_app_number] => 16/945302 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945302 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945302
Blockchain data storage based on shared nodes and error correction code Jul 30, 2020 Issued
Menu