Search

Samir Wadie Rizk

Examiner (ID: 680, Phone: (571)272-8191 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133
Total Applications
1772
Issued Applications
1604
Pending Applications
23
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18519839 [patent_doc_number] => 11709730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Transmission failure feedback schemes for reducing crosstalk [patent_app_type] => utility [patent_app_number] => 17/493985 [patent_app_country] => US [patent_app_date] => 2021-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 18332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17493985 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/493985
Transmission failure feedback schemes for reducing crosstalk Oct 4, 2021 Issued
Array ( [id] => 18447470 [patent_doc_number] => 11683051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Method and apparatus for data processing with structured LDPC codes [patent_app_type] => utility [patent_app_number] => 17/493612 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 24175 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17493612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/493612
Method and apparatus for data processing with structured LDPC codes Oct 3, 2021 Issued
Array ( [id] => 17317122 [patent_doc_number] => 20210406171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => METHOD AND SYSTEM FOR IN-LINE ECC PROTECTION [patent_app_type] => utility [patent_app_number] => 17/474141 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474141 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474141
Method and system for in-line ECC protection Sep 13, 2021 Issued
Array ( [id] => 17552520 [patent_doc_number] => 20220123863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => FORWARD ERROR CORRECTION CONTROL [patent_app_type] => utility [patent_app_number] => 17/470293 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470293
Forward error correction control Sep 8, 2021 Issued
Array ( [id] => 18262116 [patent_doc_number] => 11609817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Low latency availability in degraded redundant array of independent memory [patent_app_type] => utility [patent_app_number] => 17/470100 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470100 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470100
Low latency availability in degraded redundant array of independent memory Sep 8, 2021 Issued
Array ( [id] => 18400937 [patent_doc_number] => 11663075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Memory device with configurable error correction modes [patent_app_type] => utility [patent_app_number] => 17/470584 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 23164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470584 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470584
Memory device with configurable error correction modes Sep 8, 2021 Issued
Array ( [id] => 17709882 [patent_doc_number] => 20220209890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => FORWARD ERROR CORRECTION FOR CHIRP SPREAD SPECTRUM [patent_app_type] => utility [patent_app_number] => 17/470169 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14706 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470169 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470169
Forward error correction for chirp spread spectrum Sep 8, 2021 Issued
Array ( [id] => 17446360 [patent_doc_number] => 20220066865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => DATA TRANSMISSION CIRCUIT AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/467547 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467547 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/467547
Data transmission circuit and memory Sep 6, 2021 Issued
Array ( [id] => 18119263 [patent_doc_number] => 11550658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-01-10 [patent_title] => Storage system and method for storing logical-to-physical address table entries in a codeword in volatile memory [patent_app_type] => utility [patent_app_number] => 17/465165 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465165
Storage system and method for storing logical-to-physical address table entries in a codeword in volatile memory Sep 1, 2021 Issued
Array ( [id] => 18891680 [patent_doc_number] => 11870462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Fault tolerant and error correction decoding method and apparatus for quantum circuit, and chip [patent_app_type] => utility [patent_app_number] => 17/463090 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 18734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463090
Fault tolerant and error correction decoding method and apparatus for quantum circuit, and chip Aug 30, 2021 Issued
Array ( [id] => 18227869 [patent_doc_number] => 20230066863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => REDUNDANCY METADATA MEDIA MANAGEMENT AT A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/459846 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459846 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459846
Redundancy metadata media management at a memory sub-system Aug 26, 2021 Issued
Array ( [id] => 19197711 [patent_doc_number] => 11994949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Streaming engine with error detection, correction and restart [patent_app_type] => utility [patent_app_number] => 17/408561 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 45 [patent_no_of_words] => 25337 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17408561 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/408561
Streaming engine with error detection, correction and restart Aug 22, 2021 Issued
Array ( [id] => 18183588 [patent_doc_number] => 20230044318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SELECTIVE POWER-ON SCRUB OF MEMORY UNITS [patent_app_type] => utility [patent_app_number] => 17/394232 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394232 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394232
Selective power-on scrub of memory units Aug 3, 2021 Issued
Array ( [id] => 17263872 [patent_doc_number] => 20210376857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => HIGH-RATE LONG LDPC CODES [patent_app_type] => utility [patent_app_number] => 17/390367 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390367 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/390367
High-rate long LDPC codes Jul 29, 2021 Issued
Array ( [id] => 17230733 [patent_doc_number] => 20210357290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => Retrieval of Data Objects with a Common Trait in a Storage Network [patent_app_type] => utility [patent_app_number] => 17/443915 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 44078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17443915 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/443915
Retrieval of data objects with a common trait in a storage network Jul 27, 2021 Issued
Array ( [id] => 19167166 [patent_doc_number] => 11983069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Data rebuilding method, memory storage apparatus, and memory control circuit unit [patent_app_type] => utility [patent_app_number] => 17/386547 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9073 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386547 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/386547
Data rebuilding method, memory storage apparatus, and memory control circuit unit Jul 27, 2021 Issued
Array ( [id] => 17809476 [patent_doc_number] => 20220261311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/380593 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380593 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380593
Peripheral component interconnect express interface device and system including the same Jul 19, 2021 Issued
Array ( [id] => 18984221 [patent_doc_number] => 11909416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Device and method for efficiently encoding quasi-cyclic LDPC codes [patent_app_type] => utility [patent_app_number] => 18/018224 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6861 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18018224 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/018224
Device and method for efficiently encoding quasi-cyclic LDPC codes Jul 18, 2021 Issued
Array ( [id] => 18139182 [patent_doc_number] => 20230013018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => DATA INTEGRITY VERIFICATION OPTIMIZED AT UNIT LEVEL [patent_app_type] => utility [patent_app_number] => 17/378177 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378177 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/378177
Data integrity verification optimized at unit level Jul 15, 2021 Issued
Array ( [id] => 18189385 [patent_doc_number] => 11579970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Maintenance command interfaces for a memory system [patent_app_type] => utility [patent_app_number] => 17/375832 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 21320 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375832 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375832
Maintenance command interfaces for a memory system Jul 13, 2021 Issued
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