
Samuel A. Waldbaum
Examiner (ID: 2397)
| Most Active Art Unit | 1792 |
| Art Unit(s) | 1762, 1714, 1792, 1712 |
| Total Applications | 305 |
| Issued Applications | 127 |
| Pending Applications | 4 |
| Abandoned Applications | 174 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18440200
[patent_doc_number] => 20230187495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => MULTILAYER WORK FUNCTION METAL IN NANOSHEET STACKS USING A SACRIFICIAL OXIDE MATERIAL
[patent_app_type] => utility
[patent_app_number] => 17/643553
[patent_app_country] => US
[patent_app_date] => 2021-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10767
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17643553
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/643553 | MULTILAYER WORK FUNCTION METAL IN NANOSHEET STACKS USING A SACRIFICIAL OXIDE MATERIAL | Dec 8, 2021 | Pending |
Array
(
[id] => 18440200
[patent_doc_number] => 20230187495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => MULTILAYER WORK FUNCTION METAL IN NANOSHEET STACKS USING A SACRIFICIAL OXIDE MATERIAL
[patent_app_type] => utility
[patent_app_number] => 17/643553
[patent_app_country] => US
[patent_app_date] => 2021-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10767
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17643553
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/643553 | MULTILAYER WORK FUNCTION METAL IN NANOSHEET STACKS USING A SACRIFICIAL OXIDE MATERIAL | Dec 8, 2021 | Pending |
Array
(
[id] => 17708765
[patent_doc_number] => 20220208773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => METHOD FOR FORMING STORAGE NODE CONTACT STRUCTURE AND SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/543997
[patent_app_country] => US
[patent_app_date] => 2021-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5482
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543997
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/543997 | Method for forming storage node contact structure and semiconductor structure | Dec 6, 2021 | Issued |
Array
(
[id] => 17949679
[patent_doc_number] => 20220336698
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => Solid State Light Sheet Having Wide Support Substrate and Narrow Strips Enclosing LED Dies in Series
[patent_app_type] => utility
[patent_app_number] => 17/535523
[patent_app_country] => US
[patent_app_date] => 2021-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26939
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535523
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/535523 | Solid State Light Sheet Having Wide Support Substrate and Narrow Strips Enclosing LED Dies in Series | Nov 23, 2021 | Abandoned |
Array
(
[id] => 17477635
[patent_doc_number] => 20220085139
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-17
[patent_title] => DISPLAY UNIT
[patent_app_type] => utility
[patent_app_number] => 17/534474
[patent_app_country] => US
[patent_app_date] => 2021-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10228
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534474
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/534474 | Display unit | Nov 23, 2021 | Issued |
Array
(
[id] => 20260541
[patent_doc_number] => 12432912
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-30
[patent_title] => Mask-programmable read only memory with electrically isolated cells
[patent_app_type] => utility
[patent_app_number] => 17/531864
[patent_app_country] => US
[patent_app_date] => 2021-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 1175
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 359
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17531864
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/531864 | Mask-programmable read only memory with electrically isolated cells | Nov 21, 2021 | Issued |
Array
(
[id] => 18381908
[patent_doc_number] => 20230156999
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => METHOD FOR PREPARING MEMORY ARRAY WITH CONTACT ENHANCEMENT CAP
[patent_app_type] => utility
[patent_app_number] => 17/528505
[patent_app_country] => US
[patent_app_date] => 2021-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7744
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17528505
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/528505 | Method for preparing memory array with contact enhancement cap | Nov 16, 2021 | Issued |
Array
(
[id] => 18381907
[patent_doc_number] => 20230156998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => METHOD FOR PREPARING MEMORY ARRAY WITH CONTACT ENHANCEMENT SIDEWALL SPACERS
[patent_app_type] => utility
[patent_app_number] => 17/528490
[patent_app_country] => US
[patent_app_date] => 2021-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7741
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17528490
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/528490 | Method for preparing memory array with contact enhancement sidewall spacers | Nov 16, 2021 | Issued |
Array
(
[id] => 18381914
[patent_doc_number] => 20230157005
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/455212
[patent_app_country] => US
[patent_app_date] => 2021-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4336
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455212
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/455212 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Nov 15, 2021 | Abandoned |
Array
(
[id] => 18381914
[patent_doc_number] => 20230157005
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/455212
[patent_app_country] => US
[patent_app_date] => 2021-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4336
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455212
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/455212 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Nov 15, 2021 | Abandoned |
Array
(
[id] => 17630747
[patent_doc_number] => 20220165762
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-26
[patent_title] => PIXEL WITH BURIED OPTICAL ISOLATION
[patent_app_type] => utility
[patent_app_number] => 17/454627
[patent_app_country] => US
[patent_app_date] => 2021-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3842
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17454627
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/454627 | PIXEL WITH BURIED OPTICAL ISOLATION | Nov 11, 2021 | Pending |
Array
(
[id] => 19553832
[patent_doc_number] => 12137554
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-05
[patent_title] => Three-dimensional memory device with word-line etch stop liners and method of making thereof
[patent_app_type] => utility
[patent_app_number] => 17/525233
[patent_app_country] => US
[patent_app_date] => 2021-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 43
[patent_no_of_words] => 18558
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525233
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/525233 | Three-dimensional memory device with word-line etch stop liners and method of making thereof | Nov 11, 2021 | Issued |
Array
(
[id] => 18008719
[patent_doc_number] => 20220367486
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/512260
[patent_app_country] => US
[patent_app_date] => 2021-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5776
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17512260
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/512260 | Semiconductor memory device and method of manufacturing the same | Oct 26, 2021 | Issued |
Array
(
[id] => 18340368
[patent_doc_number] => 20230132317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-27
[patent_title] => APPARATUSES AND METHODS OF CONTROLLING HYDROGEN SUPPLY IN MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/510046
[patent_app_country] => US
[patent_app_date] => 2021-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7616
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17510046
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/510046 | Apparatuses and methods of controlling hydrogen supply in memory device | Oct 24, 2021 | Issued |
Array
(
[id] => 17403162
[patent_doc_number] => 20220045253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => LIGHT EMITTING DIODE PACKAGES
[patent_app_type] => utility
[patent_app_number] => 17/507201
[patent_app_country] => US
[patent_app_date] => 2021-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14551
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17507201
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/507201 | LIGHT EMITTING DIODE PACKAGES | Oct 20, 2021 | Pending |
Array
(
[id] => 18324922
[patent_doc_number] => 20230123050
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => DARLINGTON PAIR BIPOLAR JUNCTION TRANSISTOR SENSOR
[patent_app_type] => utility
[patent_app_number] => 17/504175
[patent_app_country] => US
[patent_app_date] => 2021-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11114
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504175
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/504175 | Darlington pair bipolar junction transistor sensor | Oct 17, 2021 | Issued |
Array
(
[id] => 18320848
[patent_doc_number] => 20230118976
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/500977
[patent_app_country] => US
[patent_app_date] => 2021-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3969
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17500977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/500977 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Oct 13, 2021 | Abandoned |
Array
(
[id] => 18270895
[patent_doc_number] => 20230092137
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => READ-ONLY MEMORY FOR CHIP SECURITY THAT IS MOSFET PROCESS COMPATIBLE
[patent_app_type] => utility
[patent_app_number] => 17/481585
[patent_app_country] => US
[patent_app_date] => 2021-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4672
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481585
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/481585 | Read-only memory for chip security that is MOSFET process compatible | Sep 21, 2021 | Issued |
Array
(
[id] => 19335775
[patent_doc_number] => 20240250205
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => MICRO-LED DEVICE AND METHOD FOR FABRICATING SAME
[patent_app_type] => utility
[patent_app_number] => 17/610512
[patent_app_country] => US
[patent_app_date] => 2021-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2496
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17610512
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/610512 | MICRO-LED DEVICE AND METHOD FOR FABRICATING SAME | Sep 16, 2021 | Pending |
Array
(
[id] => 19335775
[patent_doc_number] => 20240250205
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => MICRO-LED DEVICE AND METHOD FOR FABRICATING SAME
[patent_app_type] => utility
[patent_app_number] => 17/610512
[patent_app_country] => US
[patent_app_date] => 2021-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2496
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17610512
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/610512 | MICRO-LED DEVICE AND METHOD FOR FABRICATING SAME | Sep 16, 2021 | Pending |