
Samuel D. Fereja
Examiner (ID: 19074, Phone: (571)272-5865 , Office: P/2489 )
| Most Active Art Unit | 2487 |
| Art Unit(s) | 2489, 2487, 2486 |
| Total Applications | 727 |
| Issued Applications | 459 |
| Pending Applications | 125 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19285769
[patent_doc_number] => 20240222246
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => INTERCONNECT SUBSTRATE, METHOD OF MAKING THE SAME, AND SEMICONDUCTOR APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/542996
[patent_app_country] => US
[patent_app_date] => 2023-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7738
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542996
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/542996 | INTERCONNECT SUBSTRATE, METHOD OF MAKING THE SAME, AND SEMICONDUCTOR APPARATUS | Dec 17, 2023 | Pending |
Array
(
[id] => 20004695
[patent_doc_number] => 20250142917
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => Composite Structure, Method for Manufacturing the same and Non-Volatile Optical Memory Device
[patent_app_type] => utility
[patent_app_number] => 18/539313
[patent_app_country] => US
[patent_app_date] => 2023-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2158
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539313
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/539313 | Composite Structure, Method for Manufacturing the same and Non-Volatile Optical Memory Device | Dec 13, 2023 | Pending |
Array
(
[id] => 20065752
[patent_doc_number] => 20250203974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => FRONTSIDE-TO-BACKSIDE CONNECTION WITH CUT FOR STACKED TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 18/539385
[patent_app_country] => US
[patent_app_date] => 2023-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539385
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/539385 | FRONTSIDE-TO-BACKSIDE CONNECTION WITH CUT FOR STACKED TRANSISTOR | Dec 13, 2023 | Pending |
Array
(
[id] => 20047271
[patent_doc_number] => 20250185493
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => DISPLAY PANELS
[patent_app_type] => utility
[patent_app_number] => 18/579868
[patent_app_country] => US
[patent_app_date] => 2023-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18579868
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/579868 | DISPLAY PANELS | Dec 7, 2023 | Pending |
Array
(
[id] => 19823415
[patent_doc_number] => 20250081622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => BACK-END ACTIVE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/531089
[patent_app_country] => US
[patent_app_date] => 2023-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8927
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531089
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/531089 | BACK-END ACTIVE DEVICE | Dec 5, 2023 | Pending |
Array
(
[id] => 20047146
[patent_doc_number] => 20250185368
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => BACKSIDE CONTACT WITH EXTENSION REGION
[patent_app_type] => utility
[patent_app_number] => 18/528887
[patent_app_country] => US
[patent_app_date] => 2023-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12584
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528887
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/528887 | BACKSIDE CONTACT WITH EXTENSION REGION | Dec 4, 2023 | Pending |
Array
(
[id] => 19055107
[patent_doc_number] => 20240097076
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => DISPLAY PANEL, MANUFACTURING METHOD OF DISPLAY PANEL, AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/526785
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10308
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526785
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526785 | DISPLAY PANEL, MANUFACTURING METHOD OF DISPLAY PANEL, AND DISPLAY DEVICE | Nov 30, 2023 | Pending |
Array
(
[id] => 19073465
[patent_doc_number] => 20240107891
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => METHOD OF MANUFACTURING INTEGRATED CIRCUIT USING ENCAPSULATION DURING AN ETCH PROCESS
[patent_app_type] => utility
[patent_app_number] => 18/526636
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13160
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526636
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526636 | Method of manufacturing integrated circuit using encapsulation during an etch process | Nov 30, 2023 | Issued |
Array
(
[id] => 19627106
[patent_doc_number] => 12165955
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-10
[patent_title] => Semiconductor arrangement and method for making
[patent_app_type] => utility
[patent_app_number] => 18/517303
[patent_app_country] => US
[patent_app_date] => 2023-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 6701
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517303
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/517303 | Semiconductor arrangement and method for making | Nov 21, 2023 | Issued |
Array
(
[id] => 19981925
[patent_doc_number] => 12349427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-01
[patent_title] => Gate structures for semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 18/516215
[patent_app_country] => US
[patent_app_date] => 2023-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 47
[patent_no_of_words] => 10413
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516215
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/516215 | Gate structures for semiconductor devices | Nov 20, 2023 | Issued |
Array
(
[id] => 19040521
[patent_doc_number] => 20240090336
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => METHOD OF FABRICATING MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM)
[patent_app_type] => utility
[patent_app_number] => 18/512515
[patent_app_country] => US
[patent_app_date] => 2023-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7204
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512515
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/512515 | Method of fabricating magneto-resistive random access memory (MRAM) | Nov 16, 2023 | Issued |
Array
(
[id] => 19386899
[patent_doc_number] => 20240276769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/509307
[patent_app_country] => US
[patent_app_date] => 2023-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10500
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18509307
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/509307 | DISPLAY DEVICE | Nov 14, 2023 | Pending |
Array
(
[id] => 19509520
[patent_doc_number] => 12120962
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-15
[patent_title] => Method for fabricating semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/504176
[patent_app_country] => US
[patent_app_date] => 2023-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2496
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504176
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/504176 | Method for fabricating semiconductor device | Nov 7, 2023 | Issued |
Array
(
[id] => 18991085
[patent_doc_number] => 20240063054
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => IMAGING DEVICE, METHOD OF MANUFACTURING IMAGING DEVICE, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/500386
[patent_app_country] => US
[patent_app_date] => 2023-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13966
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500386
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/500386 | Imaging device, method of manufacturing imaging device, and electronic device | Nov 1, 2023 | Issued |
Array
(
[id] => 19446389
[patent_doc_number] => 12096704
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Semiconductor memory device and fabrication method thereof
[patent_app_type] => utility
[patent_app_number] => 18/383473
[patent_app_country] => US
[patent_app_date] => 2023-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 2727
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383473
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/383473 | Semiconductor memory device and fabrication method thereof | Oct 23, 2023 | Issued |
Array
(
[id] => 19071079
[patent_doc_number] => 20240105505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => MIDDLE OF LINE DIELECTRIC LAYER ENGINEERING FOR VIA VOID PREVENTION
[patent_app_type] => utility
[patent_app_number] => 18/471472
[patent_app_country] => US
[patent_app_date] => 2023-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4577
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471472
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/471472 | MIDDLE OF LINE DIELECTRIC LAYER ENGINEERING FOR VIA VOID PREVENTION | Sep 20, 2023 | Pending |
Array
(
[id] => 19850785
[patent_doc_number] => 20250096136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => DEVICES, SYSTEMS, AND METHODS FOR A PROGRAMMABLE THREE-DIMENSIONAL SEMICONDUCTOR POWER DELIVERY NETWORK
[patent_app_type] => utility
[patent_app_number] => 18/471114
[patent_app_country] => US
[patent_app_date] => 2023-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7942
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471114
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/471114 | DEVICES, SYSTEMS, AND METHODS FOR A PROGRAMMABLE THREE-DIMENSIONAL SEMICONDUCTOR POWER DELIVERY NETWORK | Sep 19, 2023 | Pending |
Array
(
[id] => 19057187
[patent_doc_number] => 20240099156
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => MAGNETIC MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/466868
[patent_app_country] => US
[patent_app_date] => 2023-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2289
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18466868
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/466868 | MAGNETIC MEMORY DEVICE | Sep 13, 2023 | Pending |
Array
(
[id] => 19837525
[patent_doc_number] => 20250089311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => HIGH VOLTAGE MOSFET USING SHALLOW-SHALLOW TRENCH ISOLATION STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/463463
[patent_app_country] => US
[patent_app_date] => 2023-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8231
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463463
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/463463 | HIGH VOLTAGE MOSFET USING SHALLOW-SHALLOW TRENCH ISOLATION STRUCTURE | Sep 7, 2023 | Pending |
Array
(
[id] => 19446383
[patent_doc_number] => 12096698
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Magnetic tunneling junctions with a magnetic barrier
[patent_app_type] => utility
[patent_app_number] => 18/462887
[patent_app_country] => US
[patent_app_date] => 2023-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 6724
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462887
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/462887 | Magnetic tunneling junctions with a magnetic barrier | Sep 6, 2023 | Issued |