Search

Samuel D. Fereja

Examiner (ID: 19074, Phone: (571)272-5865 , Office: P/2489 )

Most Active Art Unit
2487
Art Unit(s)
2489, 2487, 2486
Total Applications
727
Issued Applications
459
Pending Applications
125
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18698523 [patent_doc_number] => 20230329003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/209469 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209469 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209469
Semiconductor device and method for fabricating the same Jun 12, 2023 Issued
Array ( [id] => 18714899 [patent_doc_number] => 20230337547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MAGNETIC TUNNEL JUNCTION (MTJ) ELEMENT AND ITS FABRICATION PROCESS [patent_app_type] => utility [patent_app_number] => 18/331154 [patent_app_country] => US [patent_app_date] => 2023-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/331154
Magnetic tunnel junction (MTJ) element and its fabrication process Jun 6, 2023 Issued
Array ( [id] => 19548643 [patent_doc_number] => 20240365679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => Semiconductor layout pattern and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/205570 [patent_app_country] => US [patent_app_date] => 2023-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205570 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/205570
Semiconductor layout pattern and manufacturing method thereof Jun 4, 2023 Pending
Array ( [id] => 19561962 [patent_doc_number] => 20240373754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => Semiconductor structure and forming method thereof [patent_app_type] => utility [patent_app_number] => 18/203642 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203642 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/203642
Semiconductor structure and forming method thereof May 29, 2023 Pending
Array ( [id] => 18655352 [patent_doc_number] => 20230301210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => MANUFACTURING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/324173 [patent_app_country] => US [patent_app_date] => 2023-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324173 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/324173
Manufacturing method of memory device May 25, 2023 Issued
Array ( [id] => 19278992 [patent_doc_number] => 12029138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/201741 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2639 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201741 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/201741
Semiconductor device May 23, 2023 Issued
Array ( [id] => 19681446 [patent_doc_number] => 12193336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Structure and method for integrating MRAM and logic devices [patent_app_type] => utility [patent_app_number] => 18/321269 [patent_app_country] => US [patent_app_date] => 2023-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18321269 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/321269
Structure and method for integrating MRAM and logic devices May 21, 2023 Issued
Array ( [id] => 18712961 [patent_doc_number] => 20230335594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => NANOWIRE TRANSISTOR FABRICATION WITH HARDMASK LAYERS [patent_app_type] => utility [patent_app_number] => 18/318437 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5988 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18318437 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/318437
Nanowire transistor fabrication with hardmask layers May 15, 2023 Issued
Array ( [id] => 19591912 [patent_doc_number] => 20240389469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => MRAM DEVICE WITH HEXAGONAL SHAPED ELECTRODES [patent_app_type] => utility [patent_app_number] => 18/317989 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317989 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/317989
MRAM DEVICE WITH HEXAGONAL SHAPED ELECTRODES May 15, 2023 Pending
Array ( [id] => 19591911 [patent_doc_number] => 20240389468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => MRAM DEVICE WITH TRAPEZOID SHAPED ELECTRODES [patent_app_type] => utility [patent_app_number] => 18/317951 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317951 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/317951
MRAM DEVICE WITH TRAPEZOID SHAPED ELECTRODES May 15, 2023 Pending
Array ( [id] => 19208027 [patent_doc_number] => 20240179926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING RESISTANCE CHANGE LAYER WITH METAL-ORGANIC FRAMEWORK [patent_app_type] => utility [patent_app_number] => 18/315381 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18315381 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/315381
SEMICONDUCTOR DEVICE INCLUDING RESISTANCE CHANGE LAYER WITH METAL-ORGANIC FRAMEWORK May 9, 2023 Pending
Array ( [id] => 19534043 [patent_doc_number] => 20240357945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => FABRICATION METHOD FOR SUPERCONDUCTING CIRCUIT AND SUPERCONDUCTING QUANTUM CHIP [patent_app_type] => utility [patent_app_number] => 18/315401 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6612 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18315401 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/315401
Fabrication method for superconducting circuit and superconducting quantum chip May 9, 2023 Issued
Array ( [id] => 18557100 [patent_doc_number] => 20230255119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => Semiconductor Devices and Methods of Manufacturing [patent_app_type] => utility [patent_app_number] => 18/305052 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18305052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/305052
Semiconductor devices and methods of manufacturing Apr 20, 2023 Issued
Array ( [id] => 18557101 [patent_doc_number] => 20230255120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => Magnetic Tunnel Junction Device and Method [patent_app_type] => utility [patent_app_number] => 18/302538 [patent_app_country] => US [patent_app_date] => 2023-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18302538 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/302538
Magnetic tunnel junction device and method Apr 17, 2023 Issued
Array ( [id] => 18557105 [patent_doc_number] => 20230255124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => BOTTOM ELECTRODE STRUCTURE IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/300526 [patent_app_country] => US [patent_app_date] => 2023-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18300526 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/300526
BOTTOM ELECTRODE STRUCTURE IN MEMORY DEVICE Apr 13, 2023 Pending
Array ( [id] => 20566143 [patent_doc_number] => 12568770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Semiconductor memory device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 18/134039 [patent_app_country] => US [patent_app_date] => 2023-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 1157 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134039 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134039
Semiconductor memory device and fabrication method thereof Apr 12, 2023 Issued
Array ( [id] => 19010137 [patent_doc_number] => 20240074208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/300021 [patent_app_country] => US [patent_app_date] => 2023-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18300021 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/300021
SEMICONDUCTOR DEVICE Apr 12, 2023 Pending
Array ( [id] => 20566006 [patent_doc_number] => 12568630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Semiconductor memory device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 18/133539 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133539 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133539
Semiconductor memory device and fabrication method thereof Apr 11, 2023 Issued
Array ( [id] => 18516402 [patent_doc_number] => 20230232727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => DUAL OXIDE ANALOG SWITCH FOR NEUROMORPHIC SWITCHING [patent_app_type] => utility [patent_app_number] => 18/190971 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190971 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190971
Dual oxide analog switch for neuromorphic switching Mar 27, 2023 Issued
Array ( [id] => 19470799 [patent_doc_number] => 20240324469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => ENCASPULATED MRAM DEVICE WITH WRAP-AROUND TOP ELECTRODE [patent_app_type] => utility [patent_app_number] => 18/186230 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186230 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186230
ENCASPULATED MRAM DEVICE WITH WRAP-AROUND TOP ELECTRODE Mar 19, 2023 Pending
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