Search

Samuel S. Broda

Examiner (ID: 9530)

Most Active Art Unit
2123
Art Unit(s)
OPLA, 2123, 2763
Total Applications
295
Issued Applications
224
Pending Applications
47
Abandoned Applications
23

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4207750 [patent_doc_number] => 06044214 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Fault simulation method operable at a high speed' [patent_app_type] => 1 [patent_app_number] => 9/057505 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6113 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044214.pdf [firstpage_image] =>[orig_patent_app_number] => 057505 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057505
Fault simulation method operable at a high speed Apr 8, 1998 Issued
Array ( [id] => 3969023 [patent_doc_number] => 05991757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Method and system for searching an array for an array value' [patent_app_type] => 1 [patent_app_number] => 9/052477 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6864 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991757.pdf [firstpage_image] =>[orig_patent_app_number] => 052477 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052477
Method and system for searching an array for an array value Mar 30, 1998 Issued
Array ( [id] => 4258281 [patent_doc_number] => 06167363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Design for a simulation module using an object-oriented programming language' [patent_app_type] => 1 [patent_app_number] => 9/052897 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7357 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167363.pdf [firstpage_image] =>[orig_patent_app_number] => 052897 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052897
Design for a simulation module using an object-oriented programming language Mar 30, 1998 Issued
Array ( [id] => 4268494 [patent_doc_number] => 06223144 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method and apparatus for evaluating software programs for semiconductor circuits' [patent_app_type] => 1 [patent_app_number] => 9/047809 [patent_app_country] => US [patent_app_date] => 1998-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6091 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223144.pdf [firstpage_image] =>[orig_patent_app_number] => 047809 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047809
Method and apparatus for evaluating software programs for semiconductor circuits Mar 23, 1998 Issued
Array ( [id] => 1413975 [patent_doc_number] => 06549881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Interface for interfacing simulation tests written in a high-level programming language to a simulation model' [patent_app_type] => B1 [patent_app_number] => 09/046303 [patent_app_country] => US [patent_app_date] => 1998-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 4 [patent_no_of_words] => 10566 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549881.pdf [firstpage_image] =>[orig_patent_app_number] => 09046303 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/046303
Interface for interfacing simulation tests written in a high-level programming language to a simulation model Mar 22, 1998 Issued
Array ( [id] => 4207245 [patent_doc_number] => 06154718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Method, apparatus and computer program product for simulating diffusion of impurities in a semiconductor' [patent_app_type] => 1 [patent_app_number] => 9/041504 [patent_app_country] => US [patent_app_date] => 1998-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2748 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154718.pdf [firstpage_image] =>[orig_patent_app_number] => 041504 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041504
Method, apparatus and computer program product for simulating diffusion of impurities in a semiconductor Mar 11, 1998 Issued
Array ( [id] => 4144264 [patent_doc_number] => 06106561 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Simulation gridding method and apparatus including a structured areal gridder adapted for use by a reservoir simulator' [patent_app_type] => 1 [patent_app_number] => 9/034701 [patent_app_country] => US [patent_app_date] => 1998-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 72 [patent_no_of_words] => 30557 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/106/06106561.pdf [firstpage_image] =>[orig_patent_app_number] => 034701 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/034701
Simulation gridding method and apparatus including a structured areal gridder adapted for use by a reservoir simulator Mar 3, 1998 Issued
Array ( [id] => 4233252 [patent_doc_number] => 06041176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Emulation devices utilizing state machines' [patent_app_type] => 1 [patent_app_number] => 9/032656 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 12431 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041176.pdf [firstpage_image] =>[orig_patent_app_number] => 032656 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/032656
Emulation devices utilizing state machines Feb 26, 1998 Issued
Array ( [id] => 4191053 [patent_doc_number] => 06141633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Logical device verification method and apparatus' [patent_app_type] => 1 [patent_app_number] => 9/031209 [patent_app_country] => US [patent_app_date] => 1998-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 14528 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/141/06141633.pdf [firstpage_image] =>[orig_patent_app_number] => 031209 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/031209
Logical device verification method and apparatus Feb 25, 1998 Issued
Array ( [id] => 4086604 [patent_doc_number] => 06096091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Dynamically reconfigurable logic networks interconnected by fall-through FIFOs for flexible pipeline processing in a system-on-a-chip' [patent_app_type] => 1 [patent_app_number] => 9/028611 [patent_app_country] => US [patent_app_date] => 1998-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3006 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096091.pdf [firstpage_image] =>[orig_patent_app_number] => 028611 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/028611
Dynamically reconfigurable logic networks interconnected by fall-through FIFOs for flexible pipeline processing in a system-on-a-chip Feb 23, 1998 Issued
Array ( [id] => 4205790 [patent_doc_number] => 06110220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures' [patent_app_type] => 1 [patent_app_number] => 9/024839 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8591 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110220.pdf [firstpage_image] =>[orig_patent_app_number] => 024839 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/024839
Concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures Feb 16, 1998 Issued
Array ( [id] => 4411034 [patent_doc_number] => 06298320 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'System and method for testing an embedded microprocessor system containing physical and/or simulated hardware' [patent_app_type] => 1 [patent_app_number] => 9/024324 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6356 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/298/06298320.pdf [firstpage_image] =>[orig_patent_app_number] => 024324 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/024324
System and method for testing an embedded microprocessor system containing physical and/or simulated hardware Feb 16, 1998 Issued
Array ( [id] => 4224317 [patent_doc_number] => 06117180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Hardware-software co-synthesis of heterogeneous distributed embedded systems for low overhead fault tolerance' [patent_app_type] => 1 [patent_app_number] => 9/024605 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 45 [patent_no_of_words] => 13437 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/117/06117180.pdf [firstpage_image] =>[orig_patent_app_number] => 024605 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/024605
Hardware-software co-synthesis of heterogeneous distributed embedded systems for low overhead fault tolerance Feb 16, 1998 Issued
Array ( [id] => 4205966 [patent_doc_number] => 06086628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Power-related hardware-software co-synthesis of heterogeneous distributed embedded systems' [patent_app_type] => 1 [patent_app_number] => 9/025097 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 19 [patent_no_of_words] => 15319 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/086/06086628.pdf [firstpage_image] =>[orig_patent_app_number] => 025097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/025097
Power-related hardware-software co-synthesis of heterogeneous distributed embedded systems Feb 16, 1998 Issued
Array ( [id] => 4074568 [patent_doc_number] => 06053950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Layout method for a clock tree in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/023208 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1897 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/053/06053950.pdf [firstpage_image] =>[orig_patent_app_number] => 023208 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023208
Layout method for a clock tree in a semiconductor device Feb 12, 1998 Issued
Array ( [id] => 4118699 [patent_doc_number] => 06023570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Sequential and simultaneous manufacturing programming of multiple in-system programmable systems through a data network' [patent_app_type] => 1 [patent_app_number] => 9/023506 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4873 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023570.pdf [firstpage_image] =>[orig_patent_app_number] => 023506 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023506
Sequential and simultaneous manufacturing programming of multiple in-system programmable systems through a data network Feb 12, 1998 Issued
Array ( [id] => 1497426 [patent_doc_number] => 06343264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'Color selection method and system for floor, wall, and window coverings' [patent_app_type] => B1 [patent_app_number] => 09/023907 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5318 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/343/06343264.pdf [firstpage_image] =>[orig_patent_app_number] => 09023907 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023907
Color selection method and system for floor, wall, and window coverings Feb 12, 1998 Issued
09/020021 INTEGRATED CIRCUIT WITH A HIGH RESOLUTION ANALOG TO DIGITAL CONVERTOR A MICROCONTROLLER AND HIGH DENSITY MEMORY AND AN EMULATOR FOR AN INTEGRATED CIRCUIT Feb 5, 1998 Abandoned
Array ( [id] => 4379504 [patent_doc_number] => 06256603 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Performing geoscience interpretation with simulated data' [patent_app_type] => 1 [patent_app_number] => 9/019465 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4887 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256603.pdf [firstpage_image] =>[orig_patent_app_number] => 019465 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019465
Performing geoscience interpretation with simulated data Feb 4, 1998 Issued
Array ( [id] => 4137539 [patent_doc_number] => 06063129 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Means and method for system performance tracking' [patent_app_type] => 1 [patent_app_number] => 9/017806 [patent_app_country] => US [patent_app_date] => 1998-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4569 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/063/06063129.pdf [firstpage_image] =>[orig_patent_app_number] => 017806 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017806
Means and method for system performance tracking Feb 2, 1998 Issued
Menu