Search

San M. Aung

Examiner (ID: 11298, Phone: (571)270-5792 , Office: P/3657 )

Most Active Art Unit
3657
Art Unit(s)
3616, 3657, 4165
Total Applications
1243
Issued Applications
936
Pending Applications
84
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18447107 [patent_doc_number] => 11682683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => 3D micro display device and structure [patent_app_type] => utility [patent_app_number] => 17/967312 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 124 [patent_no_of_words] => 20507 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967312 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967312
3D micro display device and structure Oct 16, 2022 Issued
Array ( [id] => 18164611 [patent_doc_number] => 20230031207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/963591 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10811 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17963591 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/963591
Semiconductor memory device and method for manufacturing the same Oct 10, 2022 Issued
Array ( [id] => 19086399 [patent_doc_number] => 20240113200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => INNER SPACER RELIABILITY MACRO DESIGN AND WELL CONTACT FORMATION [patent_app_type] => utility [patent_app_number] => 17/960116 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960116
INNER SPACER RELIABILITY MACRO DESIGN AND WELL CONTACT FORMATION Oct 3, 2022 Pending
Array ( [id] => 18140746 [patent_doc_number] => 20230014586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => HORIZONTAL GAA NANO-WIRE AND NANO-SLAB TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/956061 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956061 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956061
Horizontal GAA nano-wire and nano-slab transistors Sep 28, 2022 Issued
Array ( [id] => 18146731 [patent_doc_number] => 20230020588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/956768 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956768 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956768
Electronic device and method for manufacturing electronic device Sep 28, 2022 Issued
Array ( [id] => 18143523 [patent_doc_number] => 20230017372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH IMAGE SENSORS AND WAFER BONDING [patent_app_type] => utility [patent_app_number] => 17/951545 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951545 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951545
Multilevel semiconductor device and structure with image sensors and wafer bonding Sep 22, 2022 Issued
Array ( [id] => 18140748 [patent_doc_number] => 20230014588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => Thin Film Transistor Array Substrate and Electronic Device Including the Same [patent_app_type] => utility [patent_app_number] => 17/950024 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950024
Thin film transistor array substrate and electronic device including the same Sep 20, 2022 Issued
Array ( [id] => 19094058 [patent_doc_number] => 11955525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Semiconductor device and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/941828 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7456 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941828 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941828
Semiconductor device and method of forming the same Sep 8, 2022 Issued
Array ( [id] => 19008074 [patent_doc_number] => 20240072145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING PRE-SPACER DEPOSITION CUT GATES WITH ETCH BACK PROCESS [patent_app_type] => utility [patent_app_number] => 17/893466 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893466
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING PRE-SPACER DEPOSITION CUT GATES WITH ETCH BACK PROCESS Aug 22, 2022 Pending
Array ( [id] => 20471100 [patent_doc_number] => 12527148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Detector having an element portion including an organic semiconductor layer and a wiring portion [patent_app_type] => utility [patent_app_number] => 17/820937 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 1794 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17820937 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/820937
Detector having an element portion including an organic semiconductor layer and a wiring portion Aug 18, 2022 Issued
Array ( [id] => 18849086 [patent_doc_number] => 20230411490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/891039 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891039
Semiconductor device including spacers on sides of dielectric structure and manufacturing method thereof Aug 17, 2022 Issued
Array ( [id] => 18164523 [patent_doc_number] => 20230031119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/887151 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887151 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887151
Semiconductor device and a method of manufacturing a semiconductor device Aug 11, 2022 Issued
Array ( [id] => 20540485 [patent_doc_number] => 12557574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Treatment methods for silicon nanosheet surfaces using hydrogen radicals [patent_app_type] => utility [patent_app_number] => 17/886269 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 4552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886269 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/886269
Treatment methods for silicon nanosheet surfaces using hydrogen radicals Aug 10, 2022 Issued
Array ( [id] => 18735797 [patent_doc_number] => 11804539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Transistor isolation structures [patent_app_type] => utility [patent_app_number] => 17/818786 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 9429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818786 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818786
Transistor isolation structures Aug 9, 2022 Issued
Array ( [id] => 19260922 [patent_doc_number] => 12020987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Integrated circuit structure and fabrication thereof [patent_app_type] => utility [patent_app_number] => 17/885149 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 16662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885149 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885149
Integrated circuit structure and fabrication thereof Aug 9, 2022 Issued
Array ( [id] => 18969417 [patent_doc_number] => 11903229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/884142 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 17117 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884142
Display device Aug 8, 2022 Issued
Array ( [id] => 18040401 [patent_doc_number] => 20220384618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => Method of Forming a Gate Structure [patent_app_type] => utility [patent_app_number] => 17/877221 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7427 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877221
Method of forming a gate structure Jul 28, 2022 Issued
Array ( [id] => 18951077 [patent_doc_number] => 11894384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Display apparatus having an oxide semiconductor pattern [patent_app_type] => utility [patent_app_number] => 17/876371 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 8098 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876371
Display apparatus having an oxide semiconductor pattern Jul 27, 2022 Issued
Array ( [id] => 18142043 [patent_doc_number] => 20230015886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => Gate Oxide Structures In Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 17/875751 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875751 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875751
Gate oxide structures in semiconductor devices Jul 27, 2022 Issued
Array ( [id] => 18024589 [patent_doc_number] => 20220376088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 17/815527 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815527
Semiconductor device and method Jul 26, 2022 Issued
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