
Sana A. Al Hashemi
Examiner (ID: 5836, Phone: (571)272-4013 , Office: P/2156 )
| Most Active Art Unit | 2156 |
| Art Unit(s) | 2169, 2161, 2156, 2162, 2165, 2164, 2171 |
| Total Applications | 1214 |
| Issued Applications | 976 |
| Pending Applications | 49 |
| Abandoned Applications | 194 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17802358
[patent_doc_number] => 11416659
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-08-16
[patent_title] => Implementing an asymmetric memory with random port ratios using dedicated memory primitives
[patent_app_type] => utility
[patent_app_number] => 16/834797
[patent_app_country] => US
[patent_app_date] => 2020-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 11255
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834797
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/834797 | Implementing an asymmetric memory with random port ratios using dedicated memory primitives | Mar 29, 2020 | Issued |
Array
(
[id] => 17129280
[patent_doc_number] => 20210304049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => SYSTEM ARCHITECTURE AND METHODS OF DETERMINING DEVICE BEHAVIOR
[patent_app_type] => utility
[patent_app_number] => 16/829809
[patent_app_country] => US
[patent_app_date] => 2020-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3181
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16829809
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/829809 | System architecture and methods of determining device behavior | Mar 24, 2020 | Issued |
Array
(
[id] => 16316867
[patent_doc_number] => 20200295605
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-17
[patent_title] => DECODER FOR WIRELESS CHARGING TRANSMITTER AND WIRELESS CHARGING TRANSMITTER USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/818285
[patent_app_country] => US
[patent_app_date] => 2020-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6064
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16818285
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/818285 | Decoder for wireless charging transmitter and wireless charging transmitter using the same | Mar 12, 2020 | Issued |
Array
(
[id] => 16271195
[patent_doc_number] => 20200272683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-27
[patent_title] => METHOD AND SYSTEM FOR SOLVING THE LAGRANGIAN DUAL OF A CONSTRAINED BINARY QUADRATIC PROGRAMMING PROBLEM USING A QUANTUM ANNEALER
[patent_app_type] => utility
[patent_app_number] => 16/809473
[patent_app_country] => US
[patent_app_date] => 2020-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8781
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809473
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/809473 | Method and system for solving the Lagrangian dual of a constrained binary quadratic programming problem using a quantum annealer | Mar 3, 2020 | Issued |
Array
(
[id] => 17062246
[patent_doc_number] => 11106851
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-08-31
[patent_title] => Serialization in electronic design automation flows
[patent_app_type] => utility
[patent_app_number] => 16/805604
[patent_app_country] => US
[patent_app_date] => 2020-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4657
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805604
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/805604 | Serialization in electronic design automation flows | Feb 27, 2020 | Issued |
Array
(
[id] => 17121353
[patent_doc_number] => 11132489
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-09-28
[patent_title] => Layer assignment based on wirelength threshold
[patent_app_type] => utility
[patent_app_number] => 16/805155
[patent_app_country] => US
[patent_app_date] => 2020-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8750
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805155
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/805155 | Layer assignment based on wirelength threshold | Feb 27, 2020 | Issued |
Array
(
[id] => 17523346
[patent_doc_number] => 20220109195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-07
[patent_title] => PACK BATTERY CHARGING METHOD, PACK BATTERY, AND POWER SOURCE DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/429327
[patent_app_country] => US
[patent_app_date] => 2020-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4814
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17429327
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/429327 | Pack battery charging method, pack battery, and power source device | Feb 17, 2020 | Issued |
Array
(
[id] => 17024427
[patent_doc_number] => 20210248299
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-12
[patent_title] => MACHINE LEARNING-BASED CLASSIFICATION IN PARASITIC EXTRACTION AUTOMATION FOR CIRCUIT DESIGN AND VERIFICATION
[patent_app_type] => utility
[patent_app_number] => 16/788545
[patent_app_country] => US
[patent_app_date] => 2020-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8936
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16788545
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/788545 | Machine learning-based classification in parasitic extraction automation for circuit design and verification | Feb 11, 2020 | Issued |
Array
(
[id] => 18235144
[patent_doc_number] => 11599703
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-07
[patent_title] => Chip security verification tool
[patent_app_type] => utility
[patent_app_number] => 16/783237
[patent_app_country] => US
[patent_app_date] => 2020-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 10259
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 390
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783237
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/783237 | Chip security verification tool | Feb 5, 2020 | Issued |
Array
(
[id] => 19654925
[patent_doc_number] => 12176732
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-24
[patent_title] => Wireless power charging method and electronic device using same
[patent_app_type] => utility
[patent_app_number] => 17/428908
[patent_app_country] => US
[patent_app_date] => 2020-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 13540
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 348
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17428908
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/428908 | Wireless power charging method and electronic device using same | Jan 22, 2020 | Issued |
Array
(
[id] => 16729024
[patent_doc_number] => 20210096171
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-01
[patent_title] => METHOD AND DEVICE FOR PREDICTING OPERATION PARAMETER OF INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/742160
[patent_app_country] => US
[patent_app_date] => 2020-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4585
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742160
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/742160 | Method and device for predicting operation parameter of integrated circuit | Jan 13, 2020 | Issued |
Array
(
[id] => 16348791
[patent_doc_number] => 20200313442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-01
[patent_title] => MULTI-POWER MANAGEMENT SYSTEM AND MULTI-POWER MANAGEMENT METHOD
[patent_app_type] => utility
[patent_app_number] => 16/736828
[patent_app_country] => US
[patent_app_date] => 2020-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3636
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736828
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/736828 | MULTI-POWER MANAGEMENT SYSTEM AND MULTI-POWER MANAGEMENT METHOD | Jan 7, 2020 | Abandoned |
Array
(
[id] => 16161541
[patent_doc_number] => 20200219003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-09
[patent_title] => METHOD FOR DEVELOPMENT OF A COMPILING PROCESS FOR A QUANTUM CIRCUIT ON A QUANTUM PROCESSOR AND SAID METHOD
[patent_app_type] => utility
[patent_app_number] => 16/727037
[patent_app_country] => US
[patent_app_date] => 2019-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6087
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727037
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/727037 | Method for development of a compiling process for a quantum circuit on a quantum processor and said method | Dec 25, 2019 | Issued |
Array
(
[id] => 16535567
[patent_doc_number] => 10878168
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-12-29
[patent_title] => Method for performing a layout versus schematic test for a multi-technology module
[patent_app_type] => utility
[patent_app_number] => 16/723385
[patent_app_country] => US
[patent_app_date] => 2019-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5132
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723385
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/723385 | Method for performing a layout versus schematic test for a multi-technology module | Dec 19, 2019 | Issued |
Array
(
[id] => 16788294
[patent_doc_number] => 10990728
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-04-27
[patent_title] => Functional built-in self-test architecture in an emulation system
[patent_app_type] => utility
[patent_app_number] => 16/721761
[patent_app_country] => US
[patent_app_date] => 2019-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9659
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721761
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/721761 | Functional built-in self-test architecture in an emulation system | Dec 18, 2019 | Issued |
Array
(
[id] => 17528922
[patent_doc_number] => 11301611
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-12
[patent_title] => Deterministic clustering and packing method for random logic on programmable integrated circuits
[patent_app_type] => utility
[patent_app_number] => 16/720346
[patent_app_country] => US
[patent_app_date] => 2019-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 8901
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16720346
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/720346 | Deterministic clustering and packing method for random logic on programmable integrated circuits | Dec 18, 2019 | Issued |
Array
(
[id] => 16096115
[patent_doc_number] => 20200202044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-25
[patent_title] => PROCESS DEVELOPMENT VISUALIZATION TOOL
[patent_app_type] => utility
[patent_app_number] => 16/716274
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8211
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16716274
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/716274 | Process development visualization tool | Dec 15, 2019 | Issued |
Array
(
[id] => 17151610
[patent_doc_number] => 11144688
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-10-12
[patent_title] => Virtual repeater insertion
[patent_app_type] => utility
[patent_app_number] => 16/714951
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 15003
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 255
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714951
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/714951 | Virtual repeater insertion | Dec 15, 2019 | Issued |
Array
(
[id] => 18131702
[patent_doc_number] => 11557920
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-17
[patent_title] => Wireless power receiving device, wireless charging method and system
[patent_app_type] => utility
[patent_app_number] => 16/696131
[patent_app_country] => US
[patent_app_date] => 2019-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 8002
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 470
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16696131
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/696131 | Wireless power receiving device, wireless charging method and system | Nov 25, 2019 | Issued |
Array
(
[id] => 16711276
[patent_doc_number] => 20210078423
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-18
[patent_title] => VEHICLE CHARGER AND METHOD FOR CONTROLLING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/691371
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5901
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 255
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691371
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/691371 | Vehicle charger and method for controlling the same | Nov 20, 2019 | Issued |