Search

Sana A. Al Hashemi

Examiner (ID: 5836, Phone: (571)272-4013 , Office: P/2156 )

Most Active Art Unit
2156
Art Unit(s)
2169, 2161, 2156, 2162, 2165, 2164, 2171
Total Applications
1214
Issued Applications
976
Pending Applications
49
Abandoned Applications
194

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18118595 [patent_doc_number] => 11549985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Power electronic circuit fault diagnosis method based on extremely randomized trees and stacked sparse auto-encoder algorithm [patent_app_type] => utility [patent_app_number] => 16/680532 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5051 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680532 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680532
Power electronic circuit fault diagnosis method based on extremely randomized trees and stacked sparse auto-encoder algorithm Nov 11, 2019 Issued
Array ( [id] => 16834262 [patent_doc_number] => 11010517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Methods and apparatuses for two-qubit gate reduction in quantum circuits [patent_app_type] => utility [patent_app_number] => 16/678835 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 15068 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678835
Methods and apparatuses for two-qubit gate reduction in quantum circuits Nov 7, 2019 Issued
Array ( [id] => 17942222 [patent_doc_number] => 11476686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Safety interlock [patent_app_type] => utility [patent_app_number] => 16/659086 [patent_app_country] => US [patent_app_date] => 2019-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16659086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/659086
Safety interlock Oct 20, 2019 Issued
Array ( [id] => 16864897 [patent_doc_number] => 11023641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Isolated wells for resistor devices [patent_app_type] => utility [patent_app_number] => 16/656122 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 8707 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656122 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656122
Isolated wells for resistor devices Oct 16, 2019 Issued
Array ( [id] => 17346074 [patent_doc_number] => 20220012405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => Adaptive Routing for Correcting Die Placement Errors [patent_app_type] => utility [patent_app_number] => 17/288369 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17288369 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/288369
Adaptive routing for correcting die placement errors Oct 1, 2019 Issued
Array ( [id] => 17263662 [patent_doc_number] => 20210376647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => A CHARGER DEVICE AND A METHOD OF CHARGING USING SAID CHARGER DEVICE [patent_app_type] => utility [patent_app_number] => 17/282092 [patent_app_country] => US [patent_app_date] => 2019-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17282092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/282092
Charger device and a method of charging using said charger device Sep 29, 2019 Issued
Array ( [id] => 15715353 [patent_doc_number] => 20200104443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => HARDWARE SIMULATION SYSTEMS AND METHODS FOR REDUCING SIGNAL DUMPING TIME AND SIZE BY FAST DYNAMICAL PARTIAL ALIASING OF SIGNALS HAVING SIMILAR WAVEFORM [patent_app_type] => utility [patent_app_number] => 16/586829 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586829 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586829
Hardware simulation systems and methods for reducing signal dumping time and size by fast dynamical partial aliasing of signals having similar waveform Sep 26, 2019 Issued
Array ( [id] => 16478597 [patent_doc_number] => 10853546 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Method and system for sequential equivalence checking [patent_app_type] => utility [patent_app_number] => 16/583937 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4681 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583937 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583937
Method and system for sequential equivalence checking Sep 25, 2019 Issued
Array ( [id] => 17039778 [patent_doc_number] => 20210256414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => QUANTUM TOPOLOGICAL CLASSIFICATION [patent_app_type] => utility [patent_app_number] => 16/576046 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576046 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/576046
Quantum topological classification Sep 18, 2019 Issued
Array ( [id] => 16417871 [patent_doc_number] => 10825772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Redundancy scheme for multi-chip stacked devices [patent_app_type] => utility [patent_app_number] => 16/571788 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 12593 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571788 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571788
Redundancy scheme for multi-chip stacked devices Sep 15, 2019 Issued
Array ( [id] => 17381673 [patent_doc_number] => 11239708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => In-band communication during wireless battery charging [patent_app_type] => utility [patent_app_number] => 16/555695 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 17066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555695 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555695
In-band communication during wireless battery charging Aug 28, 2019 Issued
Array ( [id] => 17788279 [patent_doc_number] => 11411419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Wireless charging of multiple rechargeable devices [patent_app_type] => utility [patent_app_number] => 16/554393 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5499 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554393 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/554393
Wireless charging of multiple rechargeable devices Aug 27, 2019 Issued
Array ( [id] => 15275563 [patent_doc_number] => 20190386516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => Wireless Charging System, Wireless Charging Device and Wireless Charging Method [patent_app_type] => utility [patent_app_number] => 16/553136 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553136 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553136
Wireless charging system, wireless charging device and wireless charging method Aug 26, 2019 Issued
Array ( [id] => 16656826 [patent_doc_number] => 20210053462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => AUTOMOTIVE BATTERY SYSTEM CONTROL ACCORDING TO CORRECTED TOP CELL VOLTAGE [patent_app_type] => utility [patent_app_number] => 16/547827 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547827 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547827
Automotive battery system control according to corrected top cell voltage Aug 21, 2019 Issued
Array ( [id] => 15598955 [patent_doc_number] => 20200076012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => CHARGE MANAGEMENT APPARATUS, CHARGE MANAGEMENT SYSTEM, CHARGE MANAGEMENT METHOD [patent_app_type] => utility [patent_app_number] => 16/544086 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8303 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544086
Charge management apparatus, charge management system, charge management method Aug 18, 2019 Issued
Array ( [id] => 16927352 [patent_doc_number] => 11048838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Integrated circuits as a service [patent_app_type] => utility [patent_app_number] => 16/528911 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 19121 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528911 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528911
Integrated circuits as a service Jul 31, 2019 Issued
Array ( [id] => 16371455 [patent_doc_number] => 10803217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Integrated circuit capable of being automatically programmed by way of programmed processes [patent_app_type] => utility [patent_app_number] => 16/529749 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1340 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529749
Integrated circuit capable of being automatically programmed by way of programmed processes Jul 31, 2019 Issued
Array ( [id] => 16424038 [patent_doc_number] => 20200349236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => GENERATION OF DYNAMIC DESIGN FLOWS FOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/527713 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527713 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/527713
Generation of dynamic design flows for integrated circuits Jul 30, 2019 Issued
Array ( [id] => 15121491 [patent_doc_number] => 20190347379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => ANALYSIS OF COUPLED NOISE FOR INTEGRATED CIRCUIT DESIGN [patent_app_type] => utility [patent_app_number] => 16/517990 [patent_app_country] => US [patent_app_date] => 2019-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517990 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517990
Analysis of coupled noise for integrated circuit design Jul 21, 2019 Issued
Array ( [id] => 18303620 [patent_doc_number] => 11625524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Integrated circuit and method of designing a layout thereof [patent_app_type] => utility [patent_app_number] => 16/516429 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 9475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516429 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516429
Integrated circuit and method of designing a layout thereof Jul 18, 2019 Issued
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