Search

Sandra L. Morris

Examiner (ID: 7416, Phone: (571)272-2622 , Office: P/2912 )

Most Active Art Unit
2912
Art Unit(s)
2912, 2902, 2900
Total Applications
6709
Issued Applications
6641
Pending Applications
1
Abandoned Applications
67

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14021593 [patent_doc_number] => 20190072790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => METHOD OF PRODUCING SUBSTRATE HAVING ALIGNMENT MARK [patent_app_type] => utility [patent_app_number] => 16/055205 [patent_app_country] => US [patent_app_date] => 2018-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16055205 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/055205
Method of producing substrate having alignment mark Aug 5, 2018 Issued
Array ( [id] => 13582051 [patent_doc_number] => 20180342574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => INTEGRATED CIRCUIT COMPRISING AT LEAST AN INTEGRATED ANTENNA [patent_app_type] => utility [patent_app_number] => 16/052777 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052777 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/052777
Integrated circuit comprising at least an integrated antenna Aug 1, 2018 Issued
Array ( [id] => 17032830 [patent_doc_number] => 11094648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Power module [patent_app_type] => utility [patent_app_number] => 16/636184 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6832 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16636184 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/636184
Power module Jul 29, 2018 Issued
Array ( [id] => 13293303 [patent_doc_number] => 10157852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Multi-stacked package-on-package structures [patent_app_type] => utility [patent_app_number] => 16/023705 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6991 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16023705 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/023705
Multi-stacked package-on-package structures Jun 28, 2018 Issued
Array ( [id] => 13670013 [patent_doc_number] => 10165203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Per-pixel performance improvement for combined visible and infrared image sensor arrays [patent_app_type] => utility [patent_app_number] => 16/000726 [patent_app_country] => US [patent_app_date] => 2018-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4600 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16000726 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/000726
Per-pixel performance improvement for combined visible and infrared image sensor arrays Jun 4, 2018 Issued
Array ( [id] => 14063987 [patent_doc_number] => 10236298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Non-volatile memory devices with vertically integrated capacitor electrodes [patent_app_type] => utility [patent_app_number] => 15/997725 [patent_app_country] => US [patent_app_date] => 2018-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 12246 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15997725 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/997725
Non-volatile memory devices with vertically integrated capacitor electrodes Jun 4, 2018 Issued
Array ( [id] => 13581689 [patent_doc_number] => 20180342393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/976125 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976125 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976125
Method for manufacturing semiconductor structure May 9, 2018 Issued
Array ( [id] => 15123317 [patent_doc_number] => 20190348292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => TRANSFERRING EUV RESIST PATTERN TO ELIMINATE PATTERN TRANSFER DEFECTIVITY [patent_app_type] => utility [patent_app_number] => 15/976285 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976285 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976285
TRANSFERRING EUV RESIST PATTERN TO ELIMINATE PATTERN TRANSFER DEFECTIVITY May 9, 2018 Abandoned
Array ( [id] => 15061255 [patent_doc_number] => 10460939 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-29 [patent_title] => Patterning method [patent_app_type] => utility [patent_app_number] => 15/975730 [patent_app_country] => US [patent_app_date] => 2018-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4468 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15975730 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/975730
Patterning method May 8, 2018 Issued
Array ( [id] => 14267659 [patent_doc_number] => 10283400 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-07 [patent_title] => Semiconductor device package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/973329 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 69 [patent_no_of_words] => 17663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973329 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973329
Semiconductor device package and manufacturing method thereof May 6, 2018 Issued
Array ( [id] => 13405705 [patent_doc_number] => 20180254395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => MAGNETICALLY GUIDED CHIPLET DISPLACEMENT [patent_app_type] => utility [patent_app_number] => 15/969402 [patent_app_country] => US [patent_app_date] => 2018-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15969402 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/969402
Magnetically guided chiplet displacement May 1, 2018 Issued
Array ( [id] => 14707437 [patent_doc_number] => 10381481 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-13 [patent_title] => Multi-layer photoresist [patent_app_type] => utility [patent_app_number] => 15/965417 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 8400 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965417 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/965417
Multi-layer photoresist Apr 26, 2018 Issued
Array ( [id] => 16896261 [patent_doc_number] => 11037823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/965457 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 9504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965457 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/965457
Method of manufacturing semiconductor device Apr 26, 2018 Issued
Array ( [id] => 16448155 [patent_doc_number] => 10840086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Plasma enhanced CVD with periodic high voltage bias [patent_app_type] => utility [patent_app_number] => 15/965621 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5959 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965621 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/965621
Plasma enhanced CVD with periodic high voltage bias Apr 26, 2018 Issued
Array ( [id] => 13921427 [patent_doc_number] => 10204837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-12 [patent_title] => Structure and method for tensile and compressive strained silicon germanium with same germanium concentration by single epitaxy step [patent_app_type] => utility [patent_app_number] => 15/951722 [patent_app_country] => US [patent_app_date] => 2018-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15951722 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/951722
Structure and method for tensile and compressive strained silicon germanium with same germanium concentration by single epitaxy step Apr 11, 2018 Issued
Array ( [id] => 13334935 [patent_doc_number] => 20180219005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => MICRO-LED ARRAY TRANSFER [patent_app_type] => utility [patent_app_number] => 15/940513 [patent_app_country] => US [patent_app_date] => 2018-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15940513 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/940513
Micro-LED array transfer Mar 28, 2018 Issued
Array ( [id] => 15857129 [patent_doc_number] => 10643860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Methods of thinning and structuring semiconductor wafers by electrical discharge machining [patent_app_type] => utility [patent_app_number] => 15/935867 [patent_app_country] => US [patent_app_date] => 2018-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 7399 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15935867 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/935867
Methods of thinning and structuring semiconductor wafers by electrical discharge machining Mar 25, 2018 Issued
Array ( [id] => 13471117 [patent_doc_number] => 20180287101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING A DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/935333 [patent_app_country] => US [patent_app_date] => 2018-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15935333 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/935333
DISPLAY DEVICE AND METHOD OF MANUFACTURING A DISPLAY DEVICE Mar 25, 2018 Abandoned
Array ( [id] => 13470261 [patent_doc_number] => 20180286673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => Method of Filling Recess and Processing Apparatus [patent_app_type] => utility [patent_app_number] => 15/935616 [patent_app_country] => US [patent_app_date] => 2018-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15935616 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/935616
Method of filling recess and processing apparatus Mar 25, 2018 Issued
Array ( [id] => 16609268 [patent_doc_number] => 10910282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Prevention of charging damage in full-depletion devices [patent_app_type] => utility [patent_app_number] => 15/926181 [patent_app_country] => US [patent_app_date] => 2018-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5203 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15926181 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/926181
Prevention of charging damage in full-depletion devices Mar 19, 2018 Issued
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