
Sang H. Nguyen
Examiner (ID: 14839, Phone: (571)272-2425 , Office: P/2886 )
| Most Active Art Unit | 2877 |
| Art Unit(s) | 2877, 2886 |
| Total Applications | 2464 |
| Issued Applications | 2109 |
| Pending Applications | 129 |
| Abandoned Applications | 259 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18097039
[patent_doc_number] => 20220415380
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-29
[patent_title] => INDEPENDENT MULTI-PAGE READ OPERATION ENHANCEMENT TECHNOLOGY
[patent_app_type] => utility
[patent_app_number] => 17/357466
[patent_app_country] => US
[patent_app_date] => 2021-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6238
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357466
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/357466 | Independent multi-page read operation enhancement technology | Jun 23, 2021 | Issued |
Array
(
[id] => 18446892
[patent_doc_number] => 11682467
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-20
[patent_title] => Nonvolatile memory device, controller for controlling the same, storage device including the same, and reading method of the same
[patent_app_type] => utility
[patent_app_number] => 17/353583
[patent_app_country] => US
[patent_app_date] => 2021-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 33
[patent_no_of_words] => 15497
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353583
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/353583 | Nonvolatile memory device, controller for controlling the same, storage device including the same, and reading method of the same | Jun 20, 2021 | Issued |
Array
(
[id] => 17143857
[patent_doc_number] => 20210311870
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => METHOD FOR MANAGING A MEMORY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/351168
[patent_app_country] => US
[patent_app_date] => 2021-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14376
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351168
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/351168 | Method for managing a memory apparatus | Jun 16, 2021 | Issued |
Array
(
[id] => 18031795
[patent_doc_number] => 11514990
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-11-29
[patent_title] => Two way single VREF trim for fully differential CDAC for accurate temperature sensing
[patent_app_type] => utility
[patent_app_number] => 17/349963
[patent_app_country] => US
[patent_app_date] => 2021-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 9956
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349963
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/349963 | Two way single VREF trim for fully differential CDAC for accurate temperature sensing | Jun 16, 2021 | Issued |
Array
(
[id] => 18766750
[patent_doc_number] => 11817157
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-14
[patent_title] => Systems and methods for detecting erratic programming in a memory system
[patent_app_type] => utility
[patent_app_number] => 17/346880
[patent_app_country] => US
[patent_app_date] => 2021-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 22
[patent_no_of_words] => 12736
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346880
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/346880 | Systems and methods for detecting erratic programming in a memory system | Jun 13, 2021 | Issued |
Array
(
[id] => 18190439
[patent_doc_number] => 11581040
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-14
[patent_title] => Semiconductor memory apparatus, operation method of the semiconductor memory apparatus and system including the semiconductor memory apparatus
[patent_app_type] => utility
[patent_app_number] => 17/344674
[patent_app_country] => US
[patent_app_date] => 2021-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 9490
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344674
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/344674 | Semiconductor memory apparatus, operation method of the semiconductor memory apparatus and system including the semiconductor memory apparatus | Jun 9, 2021 | Issued |
Array
(
[id] => 17516637
[patent_doc_number] => 11295796
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-04-05
[patent_title] => Apparatus and method for endurance of non-volatile memory banks via wear leveling and random swap injection
[patent_app_type] => utility
[patent_app_number] => 17/344817
[patent_app_country] => US
[patent_app_date] => 2021-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 16427
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344817
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/344817 | Apparatus and method for endurance of non-volatile memory banks via wear leveling and random swap injection | Jun 9, 2021 | Issued |
Array
(
[id] => 18704453
[patent_doc_number] => 11790969
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-10-17
[patent_title] => Apparatus and method for endurance of non-volatile memory banks via outlier compensation
[patent_app_type] => utility
[patent_app_number] => 17/344815
[patent_app_country] => US
[patent_app_date] => 2021-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 16430
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344815
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/344815 | Apparatus and method for endurance of non-volatile memory banks via outlier compensation | Jun 9, 2021 | Issued |
Array
(
[id] => 17645054
[patent_doc_number] => 20220172793
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-02
[patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/339503
[patent_app_country] => US
[patent_app_date] => 2021-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10107
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339503
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/339503 | Memory device and operating method thereof | Jun 3, 2021 | Issued |
Array
(
[id] => 18061421
[patent_doc_number] => 20220392507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-08
[patent_title] => APPARATUS AND METHOD FOR ENDURANCE OF NON-VOLATILE MEMORY BANKS VIA WEAR LEVELING WITH LINEAR INDEXING
[patent_app_type] => utility
[patent_app_number] => 17/339854
[patent_app_country] => US
[patent_app_date] => 2021-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16375
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339854
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/339854 | Apparatus and method for endurance of non-volatile memory banks via wear leveling with linear indexing | Jun 3, 2021 | Issued |
Array
(
[id] => 17115316
[patent_doc_number] => 20210295913
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => 2T-1R ARCHITECTURE FOR RESISTIVE RAM
[patent_app_type] => utility
[patent_app_number] => 17/338494
[patent_app_country] => US
[patent_app_date] => 2021-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13022
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338494
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/338494 | 2T-1R architecture for resistive RAM | Jun 2, 2021 | Issued |
Array
(
[id] => 18061470
[patent_doc_number] => 20220392556
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-08
[patent_title] => SYSTEMS AND METHODS FOR DISTRIBUTING PROGRAMMING SPEED AMONG BLOCKS WITH DIFFERENT PROGRAM-ERASE CYCLE COUNTS
[patent_app_type] => utility
[patent_app_number] => 17/337758
[patent_app_country] => US
[patent_app_date] => 2021-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12307
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337758
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/337758 | Systems and methods for distributing programming speed among blocks with different program-erase cycle counts | Jun 2, 2021 | Issued |
Array
(
[id] => 18105304
[patent_doc_number] => 11545198
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-03
[patent_title] => Multi-sense amplifier based access to a single port of a memory cell
[patent_app_type] => utility
[patent_app_number] => 17/334786
[patent_app_country] => US
[patent_app_date] => 2021-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6479
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334786
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/334786 | Multi-sense amplifier based access to a single port of a memory cell | May 29, 2021 | Issued |
Array
(
[id] => 18248827
[patent_doc_number] => 11605423
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-14
[patent_title] => Static random access memory with write assist adjustment
[patent_app_type] => utility
[patent_app_number] => 17/332280
[patent_app_country] => US
[patent_app_date] => 2021-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8720
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17332280
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/332280 | Static random access memory with write assist adjustment | May 26, 2021 | Issued |
Array
(
[id] => 17582620
[patent_doc_number] => 20220139475
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => NON-VOLATILE MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE DEVICE, AND METHOD OF OPERATING THE DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/328487
[patent_app_country] => US
[patent_app_date] => 2021-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9212
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328487
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/328487 | Non-volatile memory device, memory system including the device, and method of operating the device | May 23, 2021 | Issued |
Array
(
[id] => 18205220
[patent_doc_number] => 11587622
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-21
[patent_title] => Non-volatile memory device including high voltage switching circuit, and operation method of the non-volatile memory device
[patent_app_type] => utility
[patent_app_number] => 17/326397
[patent_app_country] => US
[patent_app_date] => 2021-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8200
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326397
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/326397 | Non-volatile memory device including high voltage switching circuit, and operation method of the non-volatile memory device | May 20, 2021 | Issued |
Array
(
[id] => 17346823
[patent_doc_number] => 20220013154
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-13
[patent_title] => Low Power Content Addressable Memory
[patent_app_type] => utility
[patent_app_number] => 17/327602
[patent_app_country] => US
[patent_app_date] => 2021-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3540
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327602
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/327602 | Low Power Content Addressable Memory | May 20, 2021 | Abandoned |
Array
(
[id] => 18721281
[patent_doc_number] => 11798633
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Methods and apparatuses including an asymmetric assist device
[patent_app_type] => utility
[patent_app_number] => 17/327238
[patent_app_country] => US
[patent_app_date] => 2021-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 6227
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327238
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/327238 | Methods and apparatuses including an asymmetric assist device | May 20, 2021 | Issued |
Array
(
[id] => 20111267
[patent_doc_number] => 12362002
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-15
[patent_title] => Staggered read recovery for improved read window budget in a three dimensional (3D) NAND memory array
[patent_app_type] => utility
[patent_app_number] => 17/322724
[patent_app_country] => US
[patent_app_date] => 2021-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5878
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322724
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/322724 | Staggered read recovery for improved read window budget in a three dimensional (3D) NAND memory array | May 16, 2021 | Issued |
Array
(
[id] => 17941502
[patent_doc_number] => 11475961
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-10-18
[patent_title] => Nonvolatile memory with efficient look-ahead read
[patent_app_type] => utility
[patent_app_number] => 17/307396
[patent_app_country] => US
[patent_app_date] => 2021-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 21
[patent_no_of_words] => 12569
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307396
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/307396 | Nonvolatile memory with efficient look-ahead read | May 3, 2021 | Issued |