Search

Sang H. Nguyen

Examiner (ID: 14839, Phone: (571)272-2425 , Office: P/2886 )

Most Active Art Unit
2877
Art Unit(s)
2877, 2886
Total Applications
2464
Issued Applications
2109
Pending Applications
129
Abandoned Applications
259

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17508823 [patent_doc_number] => 20220101926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => NON-VOLATILE MEMORY WITH SWITCHABLE ERASE METHODS [patent_app_type] => utility [patent_app_number] => 17/034086 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17034086 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/034086
Non-volatile memory with switchable erase methods Sep 27, 2020 Issued
Array ( [id] => 16995177 [patent_doc_number] => 20210233597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/026713 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17026713 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/026713
Nonvolatile memory device Sep 20, 2020 Issued
Array ( [id] => 17158788 [patent_doc_number] => 20210319839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => MEMORY DEVICE FOR WRITE OPERATION INCLUDING VERIFICATION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/025689 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/025689
Memory device for write operation including verification and operating method thereof Sep 17, 2020 Issued
Array ( [id] => 16560119 [patent_doc_number] => 20210005268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => NONVOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/023556 [patent_app_country] => US [patent_app_date] => 2020-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17023556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/023556
Nonvolatile memory devices Sep 16, 2020 Issued
Array ( [id] => 17295183 [patent_doc_number] => 20210391022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => POWER CONTROL METHOD FOR A MEMORY STORAGE DEVICE AND A MEMORY STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/020887 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020887 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/020887
Power control method for a memory storage device and a memory storage system Sep 14, 2020 Issued
Array ( [id] => 17010654 [patent_doc_number] => 20210241815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => ELECTRONIC DEVICE INCLUDING MEMORY DEVICE AND TRAINING METHOD [patent_app_type] => utility [patent_app_number] => 17/016554 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016554 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016554
Electronic device including memory device and training method Sep 9, 2020 Issued
Array ( [id] => 16637802 [patent_doc_number] => 10916316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Managed NAND performance throttling [patent_app_type] => utility [patent_app_number] => 17/016182 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 23014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016182
Managed NAND performance throttling Sep 8, 2020 Issued
Array ( [id] => 17099964 [patent_doc_number] => 20210287755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/016272 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016272
Semiconductor memory device and memory system Sep 8, 2020 Issued
Array ( [id] => 17099962 [patent_doc_number] => 20210287753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => SEMICONDUCTOR DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/010198 [patent_app_country] => US [patent_app_date] => 2020-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17010198 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/010198
Semiconductor device and memory system Sep 1, 2020 Issued
Array ( [id] => 18446334 [patent_doc_number] => 11681906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Bayesian network in memory [patent_app_type] => utility [patent_app_number] => 17/006602 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9323 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006602 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006602
Bayesian network in memory Aug 27, 2020 Issued
Array ( [id] => 17908418 [patent_doc_number] => 11462278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Method and apparatus for managing seed value for data scrambling in NAND memory [patent_app_type] => utility [patent_app_number] => 17/000776 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4756 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000776 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000776
Method and apparatus for managing seed value for data scrambling in NAND memory Aug 23, 2020 Issued
Array ( [id] => 17085252 [patent_doc_number] => 20210280259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/996213 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996213 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996213
Memory device and method of operating the memory device Aug 17, 2020 Issued
Array ( [id] => 18137096 [patent_doc_number] => 11562784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Apparatuses, systems, and methods for voltage based random number generation [patent_app_type] => utility [patent_app_number] => 16/994408 [patent_app_country] => US [patent_app_date] => 2020-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16994408 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/994408
Apparatuses, systems, and methods for voltage based random number generation Aug 13, 2020 Issued
Array ( [id] => 17818369 [patent_doc_number] => 11423990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Multi-stage erase operation for a memory device [patent_app_type] => utility [patent_app_number] => 16/947642 [patent_app_country] => US [patent_app_date] => 2020-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16947642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/947642
Multi-stage erase operation for a memory device Aug 10, 2020 Issued
Array ( [id] => 19213467 [patent_doc_number] => 12002539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Memory device and memory array structure using charge sharing for multi-bit convolutional neural network based computing-in-memory applications, and computing method thereof [patent_app_type] => utility [patent_app_number] => 16/985205 [patent_app_country] => US [patent_app_date] => 2020-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16985205 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/985205
Memory device and memory array structure using charge sharing for multi-bit convolutional neural network based computing-in-memory applications, and computing method thereof Aug 3, 2020 Issued
Array ( [id] => 16723512 [patent_doc_number] => 20210090659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/934082 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934082 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934082
Memory system Jul 20, 2020 Issued
Array ( [id] => 16943930 [patent_doc_number] => 11056178 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-06 [patent_title] => Read operations based on a dynamic reference [patent_app_type] => utility [patent_app_number] => 16/933829 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14777 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933829 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/933829
Read operations based on a dynamic reference Jul 19, 2020 Issued
Array ( [id] => 17210470 [patent_doc_number] => 11170845 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-09 [patent_title] => Techniques for reducing rock bottom leakage in memory [patent_app_type] => utility [patent_app_number] => 16/928658 [patent_app_country] => US [patent_app_date] => 2020-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16928658 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/928658
Techniques for reducing rock bottom leakage in memory Jul 13, 2020 Issued
Array ( [id] => 16394217 [patent_doc_number] => 20200335158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => NONVOLATILE MEMORY AND WRITING METHOD [patent_app_type] => utility [patent_app_number] => 16/919860 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/919860
Nonvolatile memory and writing method Jul 1, 2020 Issued
Array ( [id] => 16865608 [patent_doc_number] => 11024359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Memory devices adjusting operating cycle based on operating temperature [patent_app_type] => utility [patent_app_number] => 16/919808 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 11464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/919808
Memory devices adjusting operating cycle based on operating temperature Jul 1, 2020 Issued
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