Search

Sang H. Nguyen

Examiner (ID: 14839, Phone: (571)272-2425 , Office: P/2886 )

Most Active Art Unit
2877
Art Unit(s)
2877, 2886
Total Applications
2464
Issued Applications
2109
Pending Applications
129
Abandoned Applications
259

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14234569 [patent_doc_number] => 20190129457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => SEMICONDUCTOR DEVICES HAVING VOLTAGE GENERATORS USING WEIGHTED COMBINATION OF FEEDBACK VOLTAGES [patent_app_type] => utility [patent_app_number] => 16/234168 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234168
Semiconductor devices having voltage generators using weighted combination of feedback voltages Dec 26, 2018 Issued
Array ( [id] => 15045123 [patent_doc_number] => 20190333566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => MEMORY CONTROLLER FOR CONTROLLING REFRESH OPERATION AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/233510 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16233510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/233510
Memory controller for controlling refresh operation and memory system including the same Dec 26, 2018 Issued
Array ( [id] => 17070421 [patent_doc_number] => 20210272638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => REDUCED-PASS ERASE VERIFY FOR NONVOLATILE STORAGE MEDIA [patent_app_type] => utility [patent_app_number] => 17/253095 [patent_app_country] => US [patent_app_date] => 2018-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17253095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/253095
REDUCED-PASS ERASE VERIFY FOR NONVOLATILE STORAGE MEDIA Dec 24, 2018 Abandoned
Array ( [id] => 15759871 [patent_doc_number] => 10622062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => 2T-1R architecture for resistive ram [patent_app_type] => utility [patent_app_number] => 16/224206 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 64 [patent_no_of_words] => 12956 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16224206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/224206
2T-1R architecture for resistive ram Dec 17, 2018 Issued
Array ( [id] => 16020341 [patent_doc_number] => 20200185014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => Wordline Decoder Circuitry [patent_app_type] => utility [patent_app_number] => 16/213832 [patent_app_country] => US [patent_app_date] => 2018-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16213832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/213832
Wordline decoder circuitry Dec 6, 2018 Issued
Array ( [id] => 16536284 [patent_doc_number] => 10878897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => System and method for storing and retrieving multibit data in non-volatile memory using current multipliers [patent_app_type] => utility [patent_app_number] => 16/213860 [patent_app_country] => US [patent_app_date] => 2018-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16213860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/213860
System and method for storing and retrieving multibit data in non-volatile memory using current multipliers Dec 6, 2018 Issued
Array ( [id] => 14874673 [patent_doc_number] => 20190287578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY APPARATUS USING THE SENSE AMPLIFIER [patent_app_type] => utility [patent_app_number] => 16/201426 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201426 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201426
Sense amplifier and semiconductor memory apparatus using the sense amplifier Nov 26, 2018 Issued
Array ( [id] => 16788969 [patent_doc_number] => 10991406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Method, system and device for magnetic memory [patent_app_type] => utility [patent_app_number] => 16/200276 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12161 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200276 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200276
Method, system and device for magnetic memory Nov 25, 2018 Issued
Array ( [id] => 17270556 [patent_doc_number] => 11195988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Electronic device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/195483 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 13135 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195483
Electronic device and method for fabricating the same Nov 18, 2018 Issued
Array ( [id] => 16759571 [patent_doc_number] => 10978126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Ground reference scheme for a memory cell [patent_app_type] => utility [patent_app_number] => 16/184480 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 14222 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184480
Ground reference scheme for a memory cell Nov 7, 2018 Issued
Array ( [id] => 15169541 [patent_doc_number] => 10490273 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-26 [patent_title] => Linearly weight updatable CMOS synaptic array without cell location dependence [patent_app_type] => utility [patent_app_number] => 16/171638 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 42 [patent_no_of_words] => 7224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16171638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/171638
Linearly weight updatable CMOS synaptic array without cell location dependence Oct 25, 2018 Issued
Array ( [id] => 16645307 [patent_doc_number] => 10923171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Semiconductor device performing refresh operation in deep sleep mode [patent_app_type] => utility [patent_app_number] => 16/163422 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5558 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16163422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/163422
Semiconductor device performing refresh operation in deep sleep mode Oct 16, 2018 Issued
Array ( [id] => 15806923 [patent_doc_number] => 20200126604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => BOOST GENERATION CIRCUITRY FOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/162592 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/162592
Boost generation circuitry for memory Oct 16, 2018 Issued
Array ( [id] => 16566644 [patent_doc_number] => 10892018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Semiconductor memory device and refreshing method of semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/152148 [patent_app_country] => US [patent_app_date] => 2018-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6488 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152148 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152148
Semiconductor memory device and refreshing method of semiconductor memory device Oct 3, 2018 Issued
Array ( [id] => 15745263 [patent_doc_number] => 20200111521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => SYSTEMS AND METHODS FOR IMPROVED RELIABILITY OF COMPONENTS IN DYNAMIC RANDOM ACCESS MEMORY (DRAM) [patent_app_type] => utility [patent_app_number] => 16/150996 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5500 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150996
Systems and methods for improved reliability of components in dynamic random access memory (DRAM) Oct 2, 2018 Issued
Array ( [id] => 14587323 [patent_doc_number] => 20190221270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/117388 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/117388
Memory system and operating method thereof Aug 29, 2018 Issued
Array ( [id] => 15597091 [patent_doc_number] => 20200075080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => NON-LINEAR ACTIVATION FOR SENSING CIRCUITRY [patent_app_type] => utility [patent_app_number] => 16/117594 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117594 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/117594
Non-linear activation for sensing circuitry Aug 29, 2018 Issued
Array ( [id] => 16356551 [patent_doc_number] => 10797069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/118356 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 5300 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118356
Semiconductor memory device Aug 29, 2018 Issued
Array ( [id] => 15791095 [patent_doc_number] => 10629277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Signal generation circuit and semiconductor memory device including the same [patent_app_type] => utility [patent_app_number] => 16/117470 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8709 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117470 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/117470
Signal generation circuit and semiconductor memory device including the same Aug 29, 2018 Issued
Array ( [id] => 13996435 [patent_doc_number] => 20190067375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR DEVICES, HYBRID TRANSISTORS, AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/118110 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118110 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118110
Semiconductor devices, hybrid transistors, and related methods Aug 29, 2018 Issued
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