Search

Sang H. Nguyen

Examiner (ID: 14839, Phone: (571)272-2425 , Office: P/2886 )

Most Active Art Unit
2877
Art Unit(s)
2877, 2886
Total Applications
2464
Issued Applications
2109
Pending Applications
129
Abandoned Applications
259

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11043272 [patent_doc_number] => 20160240228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'MTP-Thyristor Memory Cell Circuits and Methods of Operation' [patent_app_type] => utility [patent_app_number] => 15/045112 [patent_app_country] => US [patent_app_date] => 2016-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 13486 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15045112 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/045112
MTP-thyristor memory cell circuits and methods of operation Feb 15, 2016 Issued
Array ( [id] => 11043295 [patent_doc_number] => 20160240250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'RESISTIVE MEMORY DEVICE, RESISTIVE MEMORY SYSTEM, AND METHOD OF OPERATING THE RESISTIVE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/044301 [patent_app_country] => US [patent_app_date] => 2016-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15044301 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/044301
Resistive memory device, resistive memory system, and method of operating the resistive memory system Feb 15, 2016 Issued
Array ( [id] => 11346070 [patent_doc_number] => 09530484 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Semiconductor apparatus and semiconductor system including the same' [patent_app_type] => utility [patent_app_number] => 15/044226 [patent_app_country] => US [patent_app_date] => 2016-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5035 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15044226 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/044226
Semiconductor apparatus and semiconductor system including the same Feb 15, 2016 Issued
Array ( [id] => 11551366 [patent_doc_number] => 09620220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-11 [patent_title] => 'Data retention flags in solid-state drives' [patent_app_type] => utility [patent_app_number] => 15/043443 [patent_app_country] => US [patent_app_date] => 2016-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15043443 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/043443
Data retention flags in solid-state drives Feb 11, 2016 Issued
Array ( [id] => 10817213 [patent_doc_number] => 20160163374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/043063 [patent_app_country] => US [patent_app_date] => 2016-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 37415 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15043063 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/043063
MEMORY DEVICE Feb 11, 2016 Abandoned
Array ( [id] => 11701554 [patent_doc_number] => 09691477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Resistive memory system and method of operating the resistive memory system' [patent_app_type] => utility [patent_app_number] => 15/042516 [patent_app_country] => US [patent_app_date] => 2016-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 13789 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15042516 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/042516
Resistive memory system and method of operating the resistive memory system Feb 11, 2016 Issued
Array ( [id] => 11328042 [patent_doc_number] => 20160358654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'LOW-POWER TERNARY CONTENT ADDRESSABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 15/043323 [patent_app_country] => US [patent_app_date] => 2016-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15043323 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/043323
LOW-POWER TERNARY CONTENT ADDRESSABLE MEMORY Feb 11, 2016 Abandoned
Array ( [id] => 11853700 [patent_doc_number] => 20170228192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'APPARATUSES AND METHODS FOR PARTITIONED PARALLEL DATA MOVEMENT' [patent_app_type] => utility [patent_app_number] => 15/040084 [patent_app_country] => US [patent_app_date] => 2016-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 17224 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15040084 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/040084
Apparatuses and methods for partitioned parallel data movement Feb 9, 2016 Issued
Array ( [id] => 12493551 [patent_doc_number] => 09995798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => MLU based magnetic sensor having improved programmability and sensitivity [patent_app_type] => utility [patent_app_number] => 15/543614 [patent_app_country] => US [patent_app_date] => 2015-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5948 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15543614 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/543614
MLU based magnetic sensor having improved programmability and sensitivity Dec 22, 2015 Issued
Array ( [id] => 11346100 [patent_doc_number] => 09530513 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Methods and apparatus to read memory cells based on clock pulse counts' [patent_app_type] => utility [patent_app_number] => 14/952322 [patent_app_country] => US [patent_app_date] => 2015-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 26947 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14952322 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/952322
Methods and apparatus to read memory cells based on clock pulse counts Nov 24, 2015 Issued
Array ( [id] => 11517246 [patent_doc_number] => 20170084321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/951852 [patent_app_country] => US [patent_app_date] => 2015-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5376 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14951852 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/951852
Semiconductor device and semiconductor system Nov 24, 2015 Issued
Array ( [id] => 11307401 [patent_doc_number] => 09514804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Multi-state configuration RAM cell' [patent_app_type] => utility [patent_app_number] => 14/950114 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3031 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14950114 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/950114
Multi-state configuration RAM cell Nov 23, 2015 Issued
Array ( [id] => 11439020 [patent_doc_number] => 20170040041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'MEMORY APPARATUS USING PLURALITY OF POWER SOURCES AND SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/950260 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14950260 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/950260
Memory apparatus using plurality of power sources and system including the same Nov 23, 2015 Issued
Array ( [id] => 12534201 [patent_doc_number] => 10008257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Memory bitcell with column select [patent_app_type] => utility [patent_app_number] => 14/948028 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4978 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948028 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948028
Memory bitcell with column select Nov 19, 2015 Issued
Array ( [id] => 11564448 [patent_doc_number] => 09627040 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-18 [patent_title] => '6T static random access memory cell, array and memory thereof' [patent_app_type] => utility [patent_app_number] => 14/944244 [patent_app_country] => US [patent_app_date] => 2015-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6872 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14944244 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/944244
6T static random access memory cell, array and memory thereof Nov 17, 2015 Issued
Array ( [id] => 11391601 [patent_doc_number] => 09552850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'Sense amplifier driving device and semiconductor device including the same' [patent_app_type] => utility [patent_app_number] => 14/886334 [patent_app_country] => US [patent_app_date] => 2015-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5410 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14886334 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/886334
Sense amplifier driving device and semiconductor device including the same Oct 18, 2015 Issued
Array ( [id] => 11489257 [patent_doc_number] => 09595329 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-14 [patent_title] => 'Non-volatile random access memory (NVRAM) with backup control' [patent_app_type] => utility [patent_app_number] => 14/885688 [patent_app_country] => US [patent_app_date] => 2015-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4490 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14885688 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/885688
Non-volatile random access memory (NVRAM) with backup control Oct 15, 2015 Issued
Array ( [id] => 11353431 [patent_doc_number] => 20160372171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD FOR USE IN OPERATING THE SAME BASED ON OPERATION MODE INFORMATION' [patent_app_type] => utility [patent_app_number] => 14/885702 [patent_app_country] => US [patent_app_date] => 2015-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5645 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14885702 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/885702
Semiconductor device, semiconductor system, and method for use in operating the same based on operation mode information Oct 15, 2015 Issued
Array ( [id] => 12989332 [patent_doc_number] => 20170345503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => REDUCING ERRORS CAUSED BY INTER-CELL INTERFERENCE IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/515688 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15515688 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/515688
Reducing errors caused by inter-cell interference in a memory device Sep 29, 2015 Issued
Array ( [id] => 11585589 [patent_doc_number] => 09640237 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-02 [patent_title] => 'Access methods and circuits for memory devices having multiple channels and multiple banks' [patent_app_type] => utility [patent_app_number] => 14/866260 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 28 [patent_no_of_words] => 6912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866260 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866260
Access methods and circuits for memory devices having multiple channels and multiple banks Sep 24, 2015 Issued
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