
Sang H. Nguyen
Examiner (ID: 14839, Phone: (571)272-2425 , Office: P/2886 )
| Most Active Art Unit | 2877 |
| Art Unit(s) | 2877, 2886 |
| Total Applications | 2464 |
| Issued Applications | 2109 |
| Pending Applications | 129 |
| Abandoned Applications | 259 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8568644
[patent_doc_number] => 20120331215
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-27
[patent_title] => 'METHOD FOR MANAGING A MEMORY APPARATUS, AND ASSOCIATED MEMORY APPARATUS THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/604636
[patent_app_country] => US
[patent_app_date] => 2012-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 14654
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604636
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/604636 | Method for managing a memory apparatus, and associated memory apparatus thereof | Sep 5, 2012 | Issued |
Array
(
[id] => 9337138
[patent_doc_number] => 20140063920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'Static random access memory that initializes to pre-determined state'
[patent_app_type] => utility
[patent_app_number] => 13/573278
[patent_app_country] => US
[patent_app_date] => 2012-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3872
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13573278
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/573278 | Static random access memory that initializes to pre-determined state | Aug 27, 2012 | Abandoned |
Array
(
[id] => 9851648
[patent_doc_number] => 08953388
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-10
[patent_title] => 'Memory cell assembly including an avoid disturb cell'
[patent_app_type] => utility
[patent_app_number] => 13/586136
[patent_app_country] => US
[patent_app_date] => 2012-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3536
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13586136
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/586136 | Memory cell assembly including an avoid disturb cell | Aug 14, 2012 | Issued |
Array
(
[id] => 9693609
[patent_doc_number] => 08824227
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-02
[patent_title] => 'Parallel test circuit and method of semiconductor memory apparatus'
[patent_app_type] => utility
[patent_app_number] => 13/585928
[patent_app_country] => US
[patent_app_date] => 2012-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4716
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13585928
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/585928 | Parallel test circuit and method of semiconductor memory apparatus | Aug 14, 2012 | Issued |
Array
(
[id] => 10053288
[patent_doc_number] => 09093169
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-28
[patent_title] => 'Nonvolatile semiconductor memory apparatus and data sensing method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/584990
[patent_app_country] => US
[patent_app_date] => 2012-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 5023
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13584990
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/584990 | Nonvolatile semiconductor memory apparatus and data sensing method thereof | Aug 13, 2012 | Issued |
Array
(
[id] => 8890165
[patent_doc_number] => 20130163349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-27
[patent_title] => 'PROGRAMMING PULSE GENERATION CIRCUIT AND NON-VOLATILE MEMORY APPARATUS HAVING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/585550
[patent_app_country] => US
[patent_app_date] => 2012-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4123
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13585550
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/585550 | Programming pulse generation circuit and non-volatile memory apparatus having the same | Aug 13, 2012 | Issued |
Array
(
[id] => 8840301
[patent_doc_number] => 20130135930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-30
[patent_title] => 'NONVOLATILE MEMORY APPARATUS AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/585422
[patent_app_country] => US
[patent_app_date] => 2012-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4480
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13585422
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/585422 | NONVOLATILE MEMORY APPARATUS AND METHOD FOR FABRICATING THE SAME | Aug 13, 2012 | Abandoned |
Array
(
[id] => 8813293
[patent_doc_number] => 20130114338
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-09
[patent_title] => 'VOLTAGE SUPPLY CONTROLLER, NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/571486
[patent_app_country] => US
[patent_app_date] => 2012-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9015
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13571486
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/571486 | Voltage supply controller, nonvolatile memory device and memory system | Aug 9, 2012 | Issued |
Array
(
[id] => 11775865
[patent_doc_number] => 09384810
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-05
[patent_title] => 'Monolithic multi-channel adaptable STT-MRAM'
[patent_app_type] => utility
[patent_app_number] => 13/571576
[patent_app_country] => US
[patent_app_date] => 2012-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4274
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13571576
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/571576 | Monolithic multi-channel adaptable STT-MRAM | Aug 9, 2012 | Issued |
Array
(
[id] => 9583936
[patent_doc_number] => 08773941
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-08
[patent_title] => 'Method and apparatus for decoding memory'
[patent_app_type] => utility
[patent_app_number] => 13/549437
[patent_app_country] => US
[patent_app_date] => 2012-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10999
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549437
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/549437 | Method and apparatus for decoding memory | Jul 13, 2012 | Issued |
Array
(
[id] => 10035200
[patent_doc_number] => 09076521
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-07
[patent_title] => 'Method and apparatus for decoding memory'
[patent_app_type] => utility
[patent_app_number] => 13/549436
[patent_app_country] => US
[patent_app_date] => 2012-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10994
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549436
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/549436 | Method and apparatus for decoding memory | Jul 13, 2012 | Issued |
Array
(
[id] => 8521243
[patent_doc_number] => 20120320651
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-20
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/495366
[patent_app_country] => US
[patent_app_date] => 2012-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 5333
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495366
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/495366 | Semiconductor memory device | Jun 12, 2012 | Issued |
Array
(
[id] => 10106975
[patent_doc_number] => 09142758
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-22
[patent_title] => 'Method and system for providing a magnetic junction configured for precessional switching using a bias structure'
[patent_app_type] => utility
[patent_app_number] => 13/495830
[patent_app_country] => US
[patent_app_date] => 2012-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 5941
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495830
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/495830 | Method and system for providing a magnetic junction configured for precessional switching using a bias structure | Jun 12, 2012 | Issued |
Array
(
[id] => 8840320
[patent_doc_number] => 20130135948
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-30
[patent_title] => 'SEMICONDUCTOR STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/420898
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5707
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420898
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/420898 | SEMICONDUCTOR STORAGE DEVICE | Mar 14, 2012 | Abandoned |
Array
(
[id] => 9028009
[patent_doc_number] => 08537597
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-17
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/420896
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 6616
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420896
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/420896 | Semiconductor memory device | Mar 14, 2012 | Issued |
Array
(
[id] => 8565158
[patent_doc_number] => 20120327729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-27
[patent_title] => 'MEMORY TESTING DEVICE HAVING CROSS INTERCONNECTIONS OF MULTIPLE DRIVERS AND ITS IMPLEMENTING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/421100
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3449
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13421100
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/421100 | Memory testing device having cross interconnections of multiple drivers and its implementing method | Mar 14, 2012 | Issued |
Array
(
[id] => 8938613
[patent_doc_number] => 20130188410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-25
[patent_title] => 'METHOD AND APPARATUS FOR TESTING ONE TIME PROGRAMMABLE (OTP) ARRAYS'
[patent_app_type] => utility
[patent_app_number] => 13/420832
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3235
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420832
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/420832 | METHOD AND APPARATUS FOR TESTING ONE TIME PROGRAMMABLE (OTP) ARRAYS | Mar 14, 2012 | Abandoned |
Array
(
[id] => 9047996
[patent_doc_number] => 08542552
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-24
[patent_title] => 'DLL circuit, frequency-multiplication circuit, and semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/420866
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 8897
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420866
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/420866 | DLL circuit, frequency-multiplication circuit, and semiconductor memory device | Mar 14, 2012 | Issued |
Array
(
[id] => 8726931
[patent_doc_number] => 08406066
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-26
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/417954
[patent_app_country] => US
[patent_app_date] => 2012-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 24
[patent_no_of_words] => 11479
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13417954
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/417954 | Nonvolatile semiconductor memory device | Mar 11, 2012 | Issued |
Array
(
[id] => 8314992
[patent_doc_number] => 20120192018
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-26
[patent_title] => 'APPARATUS AND METHOD FOR DETECTING OVER-PROGRAMMING CONDITION IN MULTISTATE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/410771
[patent_app_country] => US
[patent_app_date] => 2012-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6390
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410771
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/410771 | Apparatus and method for detecting over-programming condition in multistate memory device | Mar 1, 2012 | Issued |