Search

Sang H. Nguyen

Examiner (ID: 14839, Phone: (571)272-2425 , Office: P/2886 )

Most Active Art Unit
2877
Art Unit(s)
2877, 2886
Total Applications
2464
Issued Applications
2109
Pending Applications
129
Abandoned Applications
259

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6348584 [patent_doc_number] => 20100085813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'METHOD OF DRIVING A SEMICONDUCTOR MEMORY DEVICE AND A SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/598866 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 102 [patent_figures_cnt] => 102 [patent_no_of_words] => 30907 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20100085813.pdf [firstpage_image] =>[orig_patent_app_number] => 12598866 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/598866
METHOD OF DRIVING A SEMICONDUCTOR MEMORY DEVICE AND A SEMICONDUCTOR MEMORY DEVICE Jun 24, 2008 Abandoned
Array ( [id] => 4851109 [patent_doc_number] => 20080316851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/213558 [patent_app_country] => US [patent_app_date] => 2008-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 8081 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0316/20080316851.pdf [firstpage_image] =>[orig_patent_app_number] => 12213558 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213558
Semiconductor memory device Jun 19, 2008 Abandoned
Array ( [id] => 8295784 [patent_doc_number] => 08223580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Method and apparatus for decoding memory' [patent_app_type] => utility [patent_app_number] => 12/214144 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10958 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12214144 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/214144
Method and apparatus for decoding memory Jun 16, 2008 Issued
Array ( [id] => 4851089 [patent_doc_number] => 20080316831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Nonvolatile semiconductor device, system including the same, and associated methods' [patent_app_type] => utility [patent_app_number] => 12/213278 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7907 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0316/20080316831.pdf [firstpage_image] =>[orig_patent_app_number] => 12213278 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213278
Nonvolatile semiconductor device, system including the same, and associated methods Jun 16, 2008 Abandoned
Array ( [id] => 5433978 [patent_doc_number] => 20090168564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'Strobe signal controlling circuit' [patent_app_type] => utility [patent_app_number] => 12/150404 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2429 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20090168564.pdf [firstpage_image] =>[orig_patent_app_number] => 12150404 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/150404
Strobe signal controlling circuit Apr 27, 2008 Issued
Array ( [id] => 45031 [patent_doc_number] => 07782699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Auto-refresh controlling apparatus' [patent_app_type] => utility [patent_app_number] => 12/150388 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2440 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782699.pdf [firstpage_image] =>[orig_patent_app_number] => 12150388 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/150388
Auto-refresh controlling apparatus Apr 27, 2008 Issued
Array ( [id] => 5329301 [patent_doc_number] => 20090109778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'LOW-POWER SENSE AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 12/108206 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20090109778.pdf [firstpage_image] =>[orig_patent_app_number] => 12108206 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108206
LOW-POWER SENSE AMPLIFIER Apr 22, 2008 Abandoned
Array ( [id] => 5329289 [patent_doc_number] => 20090109766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'EFFICIENT SENSE COMMAND GENERATION' [patent_app_type] => utility [patent_app_number] => 12/108282 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10836 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20090109766.pdf [firstpage_image] =>[orig_patent_app_number] => 12108282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108282
Efficient sense command generation Apr 22, 2008 Issued
Array ( [id] => 5494542 [patent_doc_number] => 20090262570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'Giant magnetoresistance (GMR) memory device' [patent_app_type] => utility [patent_app_number] => 12/148020 [patent_app_country] => US [patent_app_date] => 2008-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1753 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20090262570.pdf [firstpage_image] =>[orig_patent_app_number] => 12148020 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/148020
Giant magnetoresistance (GMR) memory device Apr 15, 2008 Abandoned
Array ( [id] => 5457112 [patent_doc_number] => 20090257264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-15 [patent_title] => 'MEMORY AND METHOD OF EVALUATING A MEMORY STATE OF A RESISTIVE MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 12/101612 [patent_app_country] => US [patent_app_date] => 2008-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9892 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20090257264.pdf [firstpage_image] =>[orig_patent_app_number] => 12101612 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/101612
MEMORY AND METHOD OF EVALUATING A MEMORY STATE OF A RESISTIVE MEMORY CELL Apr 10, 2008 Abandoned
Array ( [id] => 174761 [patent_doc_number] => 07660143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-09 [patent_title] => 'Multibit ROM memory' [patent_app_type] => utility [patent_app_number] => 12/101266 [patent_app_country] => US [patent_app_date] => 2008-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 3035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/660/07660143.pdf [firstpage_image] =>[orig_patent_app_number] => 12101266 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/101266
Multibit ROM memory Apr 10, 2008 Issued
Array ( [id] => 5457120 [patent_doc_number] => 20090257272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-15 [patent_title] => 'REDUCED SIZE CHARGE PUMP FOR DRAM SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/100424 [patent_app_country] => US [patent_app_date] => 2008-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1071 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20090257272.pdf [firstpage_image] =>[orig_patent_app_number] => 12100424 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100424
REDUCED SIZE CHARGE PUMP FOR DRAM SYSTEM Apr 9, 2008 Abandoned
Array ( [id] => 5384356 [patent_doc_number] => 20090225600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-10 [patent_title] => 'FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/100490 [patent_app_country] => US [patent_app_date] => 2008-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5939 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20090225600.pdf [firstpage_image] =>[orig_patent_app_number] => 12100490 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100490
Flash memory device and program method thereof Apr 9, 2008 Issued
Array ( [id] => 4577182 [patent_doc_number] => 07848148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'One-transistor cell semiconductor on insulator random access memory' [patent_app_type] => utility [patent_app_number] => 12/099910 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 32 [patent_no_of_words] => 9235 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/848/07848148.pdf [firstpage_image] =>[orig_patent_app_number] => 12099910 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099910
One-transistor cell semiconductor on insulator random access memory Apr 8, 2008 Issued
Array ( [id] => 192053 [patent_doc_number] => 07643372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/100312 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6718 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/643/07643372.pdf [firstpage_image] =>[orig_patent_app_number] => 12100312 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100312
Semiconductor integrated circuit Apr 8, 2008 Issued
Array ( [id] => 4662288 [patent_doc_number] => 20080253195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE WHICH INCLUDES MOS TRANSISTOR HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE AND DATA READOUT METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/099514 [patent_app_country] => US [patent_app_date] => 2008-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 20773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253195.pdf [firstpage_image] =>[orig_patent_app_number] => 12099514 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099514
SEMICONDUCTOR MEMORY DEVICE WHICH INCLUDES MOS TRANSISTOR HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE AND DATA READOUT METHOD THEREOF Apr 7, 2008 Abandoned
Array ( [id] => 5568603 [patent_doc_number] => 20090251981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'MEMORY WITH A FAST STABLE SENSING AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 12/099776 [patent_app_country] => US [patent_app_date] => 2008-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2635 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20090251981.pdf [firstpage_image] =>[orig_patent_app_number] => 12099776 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099776
MEMORY WITH A FAST STABLE SENSING AMPLIFIER Apr 7, 2008 Abandoned
Array ( [id] => 4581747 [patent_doc_number] => 07859906 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-12-28 [patent_title] => 'Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit' [patent_app_type] => utility [patent_app_number] => 12/059560 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6113 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859906.pdf [firstpage_image] =>[orig_patent_app_number] => 12059560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/059560
Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit Mar 30, 2008 Issued
Array ( [id] => 5433927 [patent_doc_number] => 20090168513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'MULTIPLE LEVEL CELL MEMORY DEVICE WITH IMPROVED RELIABILITY' [patent_app_type] => utility [patent_app_number] => 12/059572 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3567 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20090168513.pdf [firstpage_image] =>[orig_patent_app_number] => 12059572 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/059572
MULTIPLE LEVEL CELL MEMORY DEVICE WITH IMPROVED RELIABILITY Mar 30, 2008 Abandoned
Array ( [id] => 4447758 [patent_doc_number] => 07864585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Multi level inhibit scheme' [patent_app_type] => utility [patent_app_number] => 12/059506 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6105 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/864/07864585.pdf [firstpage_image] =>[orig_patent_app_number] => 12059506 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/059506
Multi level inhibit scheme Mar 30, 2008 Issued
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