Search

Sanjiv Shah

Supervisory Patent Examiner (ID: 14625, Phone: (571)272-4098 , Office: P/2135 )

Most Active Art Unit
2172
Art Unit(s)
2135, 2176, 2166, 2309, 2185, 2627, 2625, 2762, 2172, 2771, 2624, 2777
Total Applications
668
Issued Applications
475
Pending Applications
97
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20043286 [patent_doc_number] => 20250181508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => TECHNIQUE FOR HANDLING PREFETCHING [patent_app_type] => utility [patent_app_number] => 18/524065 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10493 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524065
TECHNIQUE FOR HANDLING PREFETCHING Nov 29, 2023 Pending
Array ( [id] => 19022009 [patent_doc_number] => 20240078180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => EVENLY DISTRIBUTING HIERARCHICAL BINARY HASHES FOR STRIDED WORKLOADS [patent_app_type] => utility [patent_app_number] => 18/510403 [patent_app_country] => US [patent_app_date] => 2023-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510403 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510403
EVENLY DISTRIBUTING HIERARCHICAL BINARY HASHES FOR STRIDED WORKLOADS Nov 14, 2023 Pending
Array ( [id] => 19022009 [patent_doc_number] => 20240078180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => EVENLY DISTRIBUTING HIERARCHICAL BINARY HASHES FOR STRIDED WORKLOADS [patent_app_type] => utility [patent_app_number] => 18/510403 [patent_app_country] => US [patent_app_date] => 2023-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510403 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510403
EVENLY DISTRIBUTING HIERARCHICAL BINARY HASHES FOR STRIDED WORKLOADS Nov 14, 2023 Pending
Array ( [id] => 19864708 [patent_doc_number] => 20250103494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => CONCURRENT FILL AND BYTE MERGE [patent_app_type] => utility [patent_app_number] => 18/472979 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18472979 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/472979
CONCURRENT FILL AND BYTE MERGE Sep 21, 2023 Pending
Array ( [id] => 18146074 [patent_doc_number] => 20230019931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => REDUCING LATENCY FOR MEMORY OPERATIONS IN A MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/952971 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952971
REDUCING LATENCY FOR MEMORY OPERATIONS IN A MEMORY CONTROLLER Sep 25, 2022 Pending
Array ( [id] => 18146074 [patent_doc_number] => 20230019931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => REDUCING LATENCY FOR MEMORY OPERATIONS IN A MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/952971 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952971
REDUCING LATENCY FOR MEMORY OPERATIONS IN A MEMORY CONTROLLER Sep 25, 2022 Pending
Array ( [id] => 17128396 [patent_doc_number] => 20210303165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => DYNAMIC RECYCLING ALGORITHM TO HANDLE OVERLAPPING WRITES DURING SYNCHRONOUS REPLICATION OF APPLICATION WORKLOADS WITH LARGE NUMBER OF FILES [patent_app_type] => utility [patent_app_number] => 17/344805 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344805 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344805
DYNAMIC RECYCLING ALGORITHM TO HANDLE OVERLAPPING WRITES DURING SYNCHRONOUS REPLICATION OF APPLICATION WORKLOADS WITH LARGE NUMBER OF FILES Jun 9, 2021 Abandoned
Array ( [id] => 16299861 [patent_doc_number] => 20200285584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => CACHE FLUSH ABORT CONTROLLER SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 16/292178 [patent_app_country] => US [patent_app_date] => 2019-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16292178 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/292178
CACHE FLUSH ABORT CONTROLLER SYSTEM AND METHOD Mar 3, 2019 Abandoned
Array ( [id] => 15297561 [patent_doc_number] => 20190391916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => METHOD FOR MANAGING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/260011 [patent_app_country] => US [patent_app_date] => 2019-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16260011 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/260011
METHOD FOR MANAGING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE Jan 27, 2019 Abandoned
Array ( [id] => 15902757 [patent_doc_number] => 20200150898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/231880 [patent_app_country] => US [patent_app_date] => 2018-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16231880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/231880
MEMORY SYSTEM AND OPERATING METHOD THEREOF Dec 23, 2018 Abandoned
Array ( [id] => 14109619 [patent_doc_number] => 20190096485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => CONTROLLER, SEMICONDUCTOR MEMORY DEVICE, AND MEMORY SYSTEM HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 15/962460 [patent_app_country] => US [patent_app_date] => 2018-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15962460 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/962460
CONTROLLER, SEMICONDUCTOR MEMORY DEVICE, AND MEMORY SYSTEM HAVING THE SAME Apr 24, 2018 Abandoned
Array ( [id] => 16171620 [patent_doc_number] => 10713190 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-14 [patent_title] => Translation look-aside buffer prefetch initiated by bus master [patent_app_type] => utility [patent_app_number] => 15/729911 [patent_app_country] => US [patent_app_date] => 2017-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4857 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729911 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/729911
Translation look-aside buffer prefetch initiated by bus master Oct 10, 2017 Issued
Array ( [id] => 12665911 [patent_doc_number] => 20180113803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => OPERATION METHOD OF MEMORY CONTROLLER AND OPERATION METHOD OF STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/706967 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11551 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706967 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706967
OPERATION METHOD OF MEMORY CONTROLLER AND OPERATION METHOD OF STORAGE DEVICE INCLUDING THE SAME Sep 17, 2017 Abandoned
Array ( [id] => 11396874 [patent_doc_number] => 20170017409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/959772 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959772 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/959772
MEMORY SYSTEM Dec 3, 2015 Abandoned
Array ( [id] => 11397034 [patent_doc_number] => 20170017571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'METHOD AND APPARATUS FORI N-LINE DEDUPLICATION IN STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 14/959298 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959298 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/959298
METHOD AND APPARATUS FORI N-LINE DEDUPLICATION IN STORAGE DEVICES Dec 3, 2015 Abandoned
Array ( [id] => 11530808 [patent_doc_number] => 20170090786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'Distributed and Deduplicating Data Storage System and Methods of Use' [patent_app_type] => utility [patent_app_number] => 14/864850 [patent_app_country] => US [patent_app_date] => 2015-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7804 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14864850 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/864850
Distributed and Deduplicating Data Storage System and Methods of Use Sep 23, 2015 Abandoned
Array ( [id] => 10327938 [patent_doc_number] => 20150212942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'ELECTRONIC DEVICE, AND METHOD FOR ACCESSING DATA IN ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/602682 [patent_app_country] => US [patent_app_date] => 2015-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11153 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14602682 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/602682
ELECTRONIC DEVICE, AND METHOD FOR ACCESSING DATA IN ELECTRONIC DEVICE Jan 21, 2015
Array ( [id] => 8816487 [patent_doc_number] => 20130117532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'INTERLEAVING ADDRESS MODIFICATION' [patent_app_type] => utility [patent_app_number] => 13/290364 [patent_app_country] => US [patent_app_date] => 2011-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13290364 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/290364
INTERLEAVING ADDRESS MODIFICATION Nov 6, 2011 Abandoned
Array ( [id] => 6036026 [patent_doc_number] => 20110083030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'CACHE MEMORY CONTROL DEVICE, CACHE MEMORY DEVICE, PROCESSOR, AND CONTROLLING METHOD FOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/897330 [patent_app_country] => US [patent_app_date] => 2010-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17582 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20110083030.pdf [firstpage_image] =>[orig_patent_app_number] => 12897330 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/897330
CACHE MEMORY CONTROL DEVICE, CACHE MEMORY DEVICE, PROCESSOR, AND CONTROLLING METHOD FOR STORAGE DEVICE Oct 3, 2010 Abandoned
Array ( [id] => 8097795 [patent_doc_number] => 20120084504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'DYNAMIC RAID GEOMETRIES IN AN SSD ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 12/896667 [patent_app_country] => US [patent_app_date] => 2010-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14709 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20120084504.pdf [firstpage_image] =>[orig_patent_app_number] => 12896667 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/896667
DYNAMIC RAID GEOMETRIES IN AN SSD ENVIRONMENT Sep 30, 2010 Abandoned
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