
Sara A. Sass
Examiner (ID: 10889, Phone: (571)272-7182 , Office: P/3761 )
| Most Active Art Unit | 3761 |
| Art Unit(s) | 3781, 3761, 3786 |
| Total Applications | 290 |
| Issued Applications | 157 |
| Pending Applications | 6 |
| Abandoned Applications | 127 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19575239
[patent_doc_number] => 20240379531
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => BACK-END-OF-LINE PASSIVE DEVICE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/784616
[patent_app_country] => US
[patent_app_date] => 2024-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10527
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18784616
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/784616 | BACK-END-OF-LINE PASSIVE DEVICE STRUCTURE | Jul 24, 2024 | Pending |
Array
(
[id] => 19575440
[patent_doc_number] => 20240379732
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => MULTI-LAYERED RESISTOR WITH A TIGHT TEMPERATURE COEFFICIENT OF RESISTANCE TOLERANCE
[patent_app_type] => utility
[patent_app_number] => 18/782350
[patent_app_country] => US
[patent_app_date] => 2024-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11518
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18782350
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/782350 | MULTI-LAYERED RESISTOR WITH A TIGHT TEMPERATURE COEFFICIENT OF RESISTANCE TOLERANCE | Jul 23, 2024 | Pending |
Array
(
[id] => 19575364
[patent_doc_number] => 20240379656
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => INTEGRATED CHIP WITH SOLID-STATE POWER STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/780581
[patent_app_country] => US
[patent_app_date] => 2024-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7791
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18780581
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/780581 | INTEGRATED CHIP WITH SOLID-STATE POWER STORAGE DEVICE | Jul 22, 2024 | Pending |
Array
(
[id] => 20469485
[patent_doc_number] => 12525528
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-13
[patent_title] => Metal-insulator-metal device with improved performance
[patent_app_type] => utility
[patent_app_number] => 18/779427
[patent_app_country] => US
[patent_app_date] => 2024-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 17
[patent_no_of_words] => 7719
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779427
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/779427 | Metal-insulator-metal device with improved performance | Jul 21, 2024 | Issued |
Array
(
[id] => 19560006
[patent_doc_number] => 20240371798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => ENERGY HARVEST AND STORAGE DEVICE FOR SEMICONDUCTOR CHIPS AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/779007
[patent_app_country] => US
[patent_app_date] => 2024-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10948
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779007
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/779007 | ENERGY HARVEST AND STORAGE DEVICE FOR SEMICONDUCTOR CHIPS AND METHODS FOR FORMING THE SAME | Jul 20, 2024 | Pending |
Array
(
[id] => 19662182
[patent_doc_number] => 20240429247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING ARRAY SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 18/751892
[patent_app_country] => US
[patent_app_date] => 2024-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9342
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18751892
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/751892 | ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING ARRAY SUBSTRATE | Jun 23, 2024 | Pending |
Array
(
[id] => 20210983
[patent_doc_number] => 20250280703
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-04
[patent_title] => DISPLAY PANEL AND DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/750158
[patent_app_country] => US
[patent_app_date] => 2024-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2284
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750158
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/750158 | DISPLAY PANEL AND DISPLAY APPARATUS | Jun 20, 2024 | Pending |
Array
(
[id] => 19452595
[patent_doc_number] => 20240312725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => METHOD OF MANUFACTURING A TRENCH CAPACITOR WITH WAFER BOW
[patent_app_type] => utility
[patent_app_number] => 18/677991
[patent_app_country] => US
[patent_app_date] => 2024-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8094
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677991
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/677991 | Method of manufacturing a trench capacitor with wafer bow | May 29, 2024 | Issued |
Array
(
[id] => 20383436
[patent_doc_number] => 20250365929
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-27
[patent_title] => DRAM DEVICE WITH SUB 4F2 STRUCTURE COMPRISING SWITCHING INSULATING LAYER AND MULTILAYER STRUCTURE OF WORD LINE
[patent_app_type] => utility
[patent_app_number] => 18/678777
[patent_app_country] => US
[patent_app_date] => 2024-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2352
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 244
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678777
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/678777 | DRAM DEVICE WITH SUB 4F2 STRUCTURE COMPRISING SWITCHING INSULATING LAYER AND MULTILAYER STRUCTURE OF WORD LINE | May 29, 2024 | Pending |
Array
(
[id] => 20065986
[patent_doc_number] => 20250204208
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/674524
[patent_app_country] => US
[patent_app_date] => 2024-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12895
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674524
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/674524 | DISPLAY DEVICE | May 23, 2024 | Pending |
Array
(
[id] => 19980203
[patent_doc_number] => 12347690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-01
[patent_title] => Method for metal gate cut and structure thereof
[patent_app_type] => utility
[patent_app_number] => 18/672104
[patent_app_country] => US
[patent_app_date] => 2024-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 63
[patent_no_of_words] => 5405
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672104
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/672104 | Method for metal gate cut and structure thereof | May 22, 2024 | Issued |
Array
(
[id] => 19879900
[patent_doc_number] => 20250112157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-03
[patent_title] => SYSTEM AND METHODS FOR A METAL INTERFACE ARCHITECTURE
[patent_app_type] => utility
[patent_app_number] => 18/655217
[patent_app_country] => US
[patent_app_date] => 2024-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7592
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655217
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655217 | SYSTEM AND METHODS FOR A METAL INTERFACE ARCHITECTURE | May 2, 2024 | Pending |
Array
(
[id] => 19392877
[patent_doc_number] => 20240282747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => DBI TO SI BONDING FOR SIMPLIFIED HANDLE WAFER
[patent_app_type] => utility
[patent_app_number] => 18/653243
[patent_app_country] => US
[patent_app_date] => 2024-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9606
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653243
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/653243 | DBI to SI bonding for simplified handle wafer | May 1, 2024 | Issued |
Array
(
[id] => 19928373
[patent_doc_number] => 12302685
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => Light-emitting device, light-emitting apparatus, electronic device, and lighting device
[patent_app_type] => utility
[patent_app_number] => 18/645743
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 56
[patent_no_of_words] => 20622
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645743
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/645743 | Light-emitting device, light-emitting apparatus, electronic device, and lighting device | Apr 24, 2024 | Issued |
Array
(
[id] => 20155090
[patent_doc_number] => 20250254928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => SEMICONDUCTOR SOURCE/DRAIN REGIONS AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/643436
[patent_app_country] => US
[patent_app_date] => 2024-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8932
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18643436
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/643436 | SEMICONDUCTOR SOURCE/DRAIN REGIONS AND METHODS OF FORMING THE SAME | Apr 22, 2024 | Pending |
Array
(
[id] => 19349394
[patent_doc_number] => 20240258358
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-01
[patent_title] => IMAGE SENSOR AND ELECTRONIC APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/633060
[patent_app_country] => US
[patent_app_date] => 2024-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26813
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633060
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/633060 | Image sensor and electronic apparatus | Apr 10, 2024 | Issued |
Array
(
[id] => 20028774
[patent_doc_number] => 20250166996
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/624771
[patent_app_country] => US
[patent_app_date] => 2024-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624771
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/624771 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Apr 1, 2024 | Pending |
Array
(
[id] => 20286004
[patent_doc_number] => 20250311246
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => VERTICALLY STACKED CAPACITORS AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/619016
[patent_app_country] => US
[patent_app_date] => 2024-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619016
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/619016 | VERTICALLY STACKED CAPACITORS AND METHOD OF FORMING THE SAME | Mar 26, 2024 | Pending |
Array
(
[id] => 20252752
[patent_doc_number] => 20250301621
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-25
[patent_title] => ASYMMETRICAL CAPACITOR HAVING LOW LEAKAGE CURRENT AND MEMORY CELL USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/610441
[patent_app_country] => US
[patent_app_date] => 2024-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1198
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610441
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/610441 | ASYMMETRICAL CAPACITOR HAVING LOW LEAKAGE CURRENT AND MEMORY CELL USING THE SAME | Mar 19, 2024 | Pending |
Array
(
[id] => 19895013
[patent_doc_number] => 20250120325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/610037
[patent_app_country] => US
[patent_app_date] => 2024-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7979
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610037
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/610037 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | Mar 18, 2024 | Pending |