Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2881028 [patent_doc_number] => 05091847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-25 [patent_title] => 'Fault tolerant interface station' [patent_app_type] => 1 [patent_app_number] => 7/416643 [patent_app_country] => US [patent_app_date] => 1989-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 83 [patent_no_of_words] => 39369 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/091/05091847.pdf [firstpage_image] =>[orig_patent_app_number] => 416643 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/416643
Fault tolerant interface station Oct 2, 1989 Issued
Array ( [id] => 2744528 [patent_doc_number] => 05077743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-31 [patent_title] => 'System and method for decoding of convolutionally encoded data' [patent_app_type] => 1 [patent_app_number] => 7/410071 [patent_app_country] => US [patent_app_date] => 1989-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5877 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/077/05077743.pdf [firstpage_image] =>[orig_patent_app_number] => 410071 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/410071
System and method for decoding of convolutionally encoded data Sep 19, 1989 Issued
07/409712 ERROR CORRECTION METHOD FOR MULTICARRIER RADIO TRANSMISSION SYSTEM Sep 19, 1989 Abandoned
Array ( [id] => 2858447 [patent_doc_number] => 05107498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-21 [patent_title] => 'Automatic testing method for information processing devices' [patent_app_type] => 1 [patent_app_number] => 7/407121 [patent_app_country] => US [patent_app_date] => 1989-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3132 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/107/05107498.pdf [firstpage_image] =>[orig_patent_app_number] => 407121 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/407121
Automatic testing method for information processing devices Sep 13, 1989 Issued
Array ( [id] => 2716274 [patent_doc_number] => 05068854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Error detection for fiber distributed interfaced optic link' [patent_app_type] => 1 [patent_app_number] => 7/406012 [patent_app_country] => US [patent_app_date] => 1989-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3905 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068854.pdf [firstpage_image] =>[orig_patent_app_number] => 406012 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/406012
Error detection for fiber distributed interfaced optic link Sep 11, 1989 Issued
Array ( [id] => 2767612 [patent_doc_number] => 05043989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'Terminal adapter having a multiple HDLC communication channels receiver for processing control network management frames' [patent_app_type] => 1 [patent_app_number] => 7/401892 [patent_app_country] => US [patent_app_date] => 1989-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6793 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043989.pdf [firstpage_image] =>[orig_patent_app_number] => 401892 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/401892
Terminal adapter having a multiple HDLC communication channels receiver for processing control network management frames Aug 31, 1989 Issued
Array ( [id] => 2827427 [patent_doc_number] => 05081628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Cordless keyboard' [patent_app_type] => 1 [patent_app_number] => 7/401802 [patent_app_country] => US [patent_app_date] => 1989-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3168 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081628.pdf [firstpage_image] =>[orig_patent_app_number] => 401802 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/401802
Cordless keyboard Aug 31, 1989 Issued
Array ( [id] => 2864504 [patent_doc_number] => 05127009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'Method and apparatus for circuit board testing with controlled backdrive stress' [patent_app_type] => 1 [patent_app_number] => 7/399853 [patent_app_country] => US [patent_app_date] => 1989-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 11404 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/127/05127009.pdf [firstpage_image] =>[orig_patent_app_number] => 399853 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/399853
Method and apparatus for circuit board testing with controlled backdrive stress Aug 28, 1989 Issued
Array ( [id] => 2670925 [patent_doc_number] => 05066139 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Coupler verification test circuit' [patent_app_type] => 1 [patent_app_number] => 7/399686 [patent_app_country] => US [patent_app_date] => 1989-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 2282 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/066/05066139.pdf [firstpage_image] =>[orig_patent_app_number] => 399686 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/399686
Coupler verification test circuit Aug 27, 1989 Issued
Array ( [id] => 2758385 [patent_doc_number] => 05038349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Method for reducing masking of errors when using a grid-based, \"cross-check\" test structure' [patent_app_type] => 1 [patent_app_number] => 7/398794 [patent_app_country] => US [patent_app_date] => 1989-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3187 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038349.pdf [firstpage_image] =>[orig_patent_app_number] => 398794 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/398794
Method for reducing masking of errors when using a grid-based, "cross-check" test structure Aug 24, 1989 Issued
Array ( [id] => 2717570 [patent_doc_number] => 05014275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Sequential decoder' [patent_app_type] => 1 [patent_app_number] => 7/398501 [patent_app_country] => US [patent_app_date] => 1989-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5923 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/014/05014275.pdf [firstpage_image] =>[orig_patent_app_number] => 398501 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/398501
Sequential decoder Aug 24, 1989 Issued
Array ( [id] => 2717931 [patent_doc_number] => 05062109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-29 [patent_title] => 'Memory tester' [patent_app_type] => 1 [patent_app_number] => 7/398449 [patent_app_country] => US [patent_app_date] => 1989-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3247 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/062/05062109.pdf [firstpage_image] =>[orig_patent_app_number] => 398449 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/398449
Memory tester Aug 24, 1989 Issued
Array ( [id] => 2767593 [patent_doc_number] => 05043988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'Method and apparatus for high precision weighted random pattern generation' [patent_app_type] => 1 [patent_app_number] => 7/398772 [patent_app_country] => US [patent_app_date] => 1989-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8018 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043988.pdf [firstpage_image] =>[orig_patent_app_number] => 398772 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/398772
Method and apparatus for high precision weighted random pattern generation Aug 24, 1989 Issued
Array ( [id] => 2798509 [patent_doc_number] => 05101410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-31 [patent_title] => 'Data transmission system for a portable data storage medium' [patent_app_type] => 1 [patent_app_number] => 7/395796 [patent_app_country] => US [patent_app_date] => 1989-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4139 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/101/05101410.pdf [firstpage_image] =>[orig_patent_app_number] => 395796 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/395796
Data transmission system for a portable data storage medium Aug 17, 1989 Issued
Array ( [id] => 2725934 [patent_doc_number] => 05054026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Microprocessor having functional redundancy monitoring mode of operation' [patent_app_type] => 1 [patent_app_number] => 7/393180 [patent_app_country] => US [patent_app_date] => 1989-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4889 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 548 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/054/05054026.pdf [firstpage_image] =>[orig_patent_app_number] => 393180 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/393180
Microprocessor having functional redundancy monitoring mode of operation Aug 13, 1989 Issued
Array ( [id] => 2719146 [patent_doc_number] => 05056093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'System scan path architecture' [patent_app_type] => 1 [patent_app_number] => 7/391751 [patent_app_country] => US [patent_app_date] => 1989-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 14531 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/056/05056093.pdf [firstpage_image] =>[orig_patent_app_number] => 391751 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/391751
System scan path architecture Aug 8, 1989 Issued
Array ( [id] => 2725871 [patent_doc_number] => 05054024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'System scan path architecture with remote bus controller' [patent_app_type] => 1 [patent_app_number] => 7/391801 [patent_app_country] => US [patent_app_date] => 1989-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 14551 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/054/05054024.pdf [firstpage_image] =>[orig_patent_app_number] => 391801 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/391801
System scan path architecture with remote bus controller Aug 8, 1989 Issued
Array ( [id] => 2716216 [patent_doc_number] => 05068851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Apparatus and method for documenting faults in computing modules' [patent_app_type] => 1 [patent_app_number] => 7/388093 [patent_app_country] => US [patent_app_date] => 1989-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 30 [patent_no_of_words] => 22810 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068851.pdf [firstpage_image] =>[orig_patent_app_number] => 388093 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/388093
Apparatus and method for documenting faults in computing modules Jul 31, 1989 Issued
Array ( [id] => 2680636 [patent_doc_number] => 05048022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Memory device with transfer of ECC signals on time division multiplexed bidirectional lines' [patent_app_type] => 1 [patent_app_number] => 7/388323 [patent_app_country] => US [patent_app_date] => 1989-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 20694 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/048/05048022.pdf [firstpage_image] =>[orig_patent_app_number] => 388323 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/388323
Memory device with transfer of ECC signals on time division multiplexed bidirectional lines Jul 31, 1989 Issued
Array ( [id] => 2719489 [patent_doc_number] => 05042037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-20 [patent_title] => 'Digital data modulation circuit having a DC component suppression function' [patent_app_type] => 1 [patent_app_number] => 7/387792 [patent_app_country] => US [patent_app_date] => 1989-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4504 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/042/05042037.pdf [firstpage_image] =>[orig_patent_app_number] => 387792 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/387792
Digital data modulation circuit having a DC component suppression function Jul 31, 1989 Issued
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