
Sara Elizabeth Townsley
Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )
| Most Active Art Unit | 1629 |
| Art Unit(s) | 1629, 1612, 1613 |
| Total Applications | 514 |
| Issued Applications | 97 |
| Pending Applications | 81 |
| Abandoned Applications | 352 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2725852
[patent_doc_number] => 05054023
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-01
[patent_title] => '\"Smart\" watchdog safety switch'
[patent_app_type] => 1
[patent_app_number] => 7/350953
[patent_app_country] => US
[patent_app_date] => 1989-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 21
[patent_no_of_words] => 6304
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/054/05054023.pdf
[firstpage_image] =>[orig_patent_app_number] => 350953
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/350953 | Smart" watchdog safety switch | May 11, 1989 | Issued |
Array
(
[id] => 2744671
[patent_doc_number] => 05051994
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-24
[patent_title] => 'Computer memory module'
[patent_app_type] => 1
[patent_app_number] => 7/345323
[patent_app_country] => US
[patent_app_date] => 1989-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2978
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/051/05051994.pdf
[firstpage_image] =>[orig_patent_app_number] => 345323
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/345323 | Computer memory module | Apr 27, 1989 | Issued |
Array
(
[id] => 2681673
[patent_doc_number] => 05027269
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-25
[patent_title] => 'Method and apparatus for providing continuous availability of applications in a computer network'
[patent_app_type] => 1
[patent_app_number] => 7/344333
[patent_app_country] => US
[patent_app_date] => 1989-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3813
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/027/05027269.pdf
[firstpage_image] =>[orig_patent_app_number] => 344333
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/344333 | Method and apparatus for providing continuous availability of applications in a computer network | Apr 26, 1989 | Issued |
Array
(
[id] => 2890427
[patent_doc_number] => 05109385
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-28
[patent_title] => 'Enhanced data formats and machine operations for enabling error correction'
[patent_app_type] => 1
[patent_app_number] => 7/343551
[patent_app_country] => US
[patent_app_date] => 1989-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 10655
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/109/05109385.pdf
[firstpage_image] =>[orig_patent_app_number] => 343551
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/343551 | Enhanced data formats and machine operations for enabling error correction | Apr 26, 1989 | Issued |
| 07/340325 | METHOD FOR AUTOMATIC ISOLATION OF FUNCTIONAL BLOCKS WITHIN INTEGRATED CIRCUITS | Apr 17, 1989 | Abandoned |
Array
(
[id] => 2722731
[patent_doc_number] => 05010551
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-23
[patent_title] => 'Self contained troubleshooting aid for declared and non declared machine problems'
[patent_app_type] => 1
[patent_app_number] => 7/339462
[patent_app_country] => US
[patent_app_date] => 1989-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4650
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/010/05010551.pdf
[firstpage_image] =>[orig_patent_app_number] => 339462
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/339462 | Self contained troubleshooting aid for declared and non declared machine problems | Apr 13, 1989 | Issued |
Array
(
[id] => 2683384
[patent_doc_number] => 05027355
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-25
[patent_title] => 'Logic circuit and design method for improved testability'
[patent_app_type] => 1
[patent_app_number] => 7/338804
[patent_app_country] => US
[patent_app_date] => 1989-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4313
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/027/05027355.pdf
[firstpage_image] =>[orig_patent_app_number] => 338804
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/338804 | Logic circuit and design method for improved testability | Apr 13, 1989 | Issued |
Array
(
[id] => 2703837
[patent_doc_number] => 05020059
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Reconfigurable signal processor'
[patent_app_type] => 1
[patent_app_number] => 7/331411
[patent_app_country] => US
[patent_app_date] => 1989-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 6833
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/020/05020059.pdf
[firstpage_image] =>[orig_patent_app_number] => 331411
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/331411 | Reconfigurable signal processor | Mar 30, 1989 | Issued |
Array
(
[id] => 2624547
[patent_doc_number] => 04943967
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-24
[patent_title] => 'Semiconductor memory with an improved dummy cell arrangement and with a built-in error correction code circuit'
[patent_app_type] => 1
[patent_app_number] => 7/326653
[patent_app_country] => US
[patent_app_date] => 1989-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 13315
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/943/04943967.pdf
[firstpage_image] =>[orig_patent_app_number] => 326653
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/326653 | Semiconductor memory with an improved dummy cell arrangement and with a built-in error correction code circuit | Mar 20, 1989 | Issued |
Array
(
[id] => 2760366
[patent_doc_number] => 05022030
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-04
[patent_title] => 'Skewed XOR data storage process'
[patent_app_type] => 1
[patent_app_number] => 7/325281
[patent_app_country] => US
[patent_app_date] => 1989-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3126
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/022/05022030.pdf
[firstpage_image] =>[orig_patent_app_number] => 325281
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/325281 | Skewed XOR data storage process | Mar 16, 1989 | Issued |
Array
(
[id] => 2689229
[patent_doc_number] => 05005172
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-02
[patent_title] => 'Diagnostic system in a data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/323941
[patent_app_country] => US
[patent_app_date] => 1989-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5948
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/005/05005172.pdf
[firstpage_image] =>[orig_patent_app_number] => 323941
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/323941 | Diagnostic system in a data processing system | Mar 14, 1989 | Issued |
Array
(
[id] => 2599269
[patent_doc_number] => 04970725
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-13
[patent_title] => 'Automated system testability assessment method'
[patent_app_type] => 1
[patent_app_number] => 7/323023
[patent_app_country] => US
[patent_app_date] => 1989-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4920
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/970/04970725.pdf
[firstpage_image] =>[orig_patent_app_number] => 323023
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/323023 | Automated system testability assessment method | Mar 13, 1989 | Issued |
Array
(
[id] => 2742798
[patent_doc_number] => 04998253
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-05
[patent_title] => 'Syndrome sequential decoder'
[patent_app_type] => 1
[patent_app_number] => 7/320633
[patent_app_country] => US
[patent_app_date] => 1989-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3831
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 257
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/998/04998253.pdf
[firstpage_image] =>[orig_patent_app_number] => 320633
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/320633 | Syndrome sequential decoder | Mar 7, 1989 | Issued |
Array
(
[id] => 2683402
[patent_doc_number] => 05027356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-25
[patent_title] => 'Error control system'
[patent_app_type] => 1
[patent_app_number] => 7/320442
[patent_app_country] => US
[patent_app_date] => 1989-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4985
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/027/05027356.pdf
[firstpage_image] =>[orig_patent_app_number] => 320442
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/320442 | Error control system | Mar 7, 1989 | Issued |
| 07/318983 | LOW COST SYMBOL ERROR CORRECTION CODING AND DECODING | Mar 5, 1989 | Abandoned |
Array
(
[id] => 2837143
[patent_doc_number] => 05117427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-26
[patent_title] => 'Communication system with concatenated coding error correction'
[patent_app_type] => 1
[patent_app_number] => 7/318152
[patent_app_country] => US
[patent_app_date] => 1989-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 26
[patent_no_of_words] => 6328
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/117/05117427.pdf
[firstpage_image] =>[orig_patent_app_number] => 318152
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/318152 | Communication system with concatenated coding error correction | Mar 1, 1989 | Issued |
Array
(
[id] => 2776352
[patent_doc_number] => 05007055
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-09
[patent_title] => 'Information distribution system'
[patent_app_type] => 1
[patent_app_number] => 7/314792
[patent_app_country] => US
[patent_app_date] => 1989-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 2741
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/007/05007055.pdf
[firstpage_image] =>[orig_patent_app_number] => 314792
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/314792 | Information distribution system | Feb 23, 1989 | Issued |
Array
(
[id] => 2703855
[patent_doc_number] => 05020060
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Error code correction device having a galois arithmetic unit'
[patent_app_type] => 1
[patent_app_number] => 7/313963
[patent_app_country] => US
[patent_app_date] => 1989-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5689
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 721
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/020/05020060.pdf
[firstpage_image] =>[orig_patent_app_number] => 313963
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/313963 | Error code correction device having a galois arithmetic unit | Feb 16, 1989 | Issued |
Array
(
[id] => 2860163
[patent_doc_number] => 05105427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-14
[patent_title] => 'Data storage apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/309882
[patent_app_country] => US
[patent_app_date] => 1989-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 4594
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/105/05105427.pdf
[firstpage_image] =>[orig_patent_app_number] => 309882
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/309882 | Data storage apparatus | Feb 13, 1989 | Issued |
| 07/308273 | EVENT QUALIFIED TESTING PROTOCOLS FOR INTEGRATED CIRCUITS | Feb 7, 1989 | Abandoned |