Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2717372 [patent_doc_number] => 05001713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Event qualified testing architecture for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/308272 [patent_app_country] => US [patent_app_date] => 1989-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 16046 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001713.pdf [firstpage_image] =>[orig_patent_app_number] => 308272 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/308272
Event qualified testing architecture for integrated circuits Feb 7, 1989 Issued
Array ( [id] => 2773864 [patent_doc_number] => 04995041 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Write back buffer with error correcting capabilities' [patent_app_type] => 1 [patent_app_number] => 7/306703 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7218 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/995/04995041.pdf [firstpage_image] =>[orig_patent_app_number] => 306703 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/306703
Write back buffer with error correcting capabilities Feb 2, 1989 Issued
Array ( [id] => 2773844 [patent_doc_number] => 04995040 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Apparatus for management, comparison, and correction of redundant digital data' [patent_app_type] => 1 [patent_app_number] => 7/306611 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3623 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/995/04995040.pdf [firstpage_image] =>[orig_patent_app_number] => 306611 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/306611
Apparatus for management, comparison, and correction of redundant digital data Feb 2, 1989 Issued
Array ( [id] => 2744456 [patent_doc_number] => 05077740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-31 [patent_title] => 'Logic circuit having normal input/output data paths disabled when test data is transferred during macrocell testing' [patent_app_type] => 1 [patent_app_number] => 7/303232 [patent_app_country] => US [patent_app_date] => 1989-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4045 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/077/05077740.pdf [firstpage_image] =>[orig_patent_app_number] => 303232 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/303232
Logic circuit having normal input/output data paths disabled when test data is transferred during macrocell testing Jan 29, 1989 Issued
Array ( [id] => 2866086 [patent_doc_number] => 05084873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-28 [patent_title] => 'Chip error detector' [patent_app_type] => 1 [patent_app_number] => 7/302842 [patent_app_country] => US [patent_app_date] => 1989-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2737 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/084/05084873.pdf [firstpage_image] =>[orig_patent_app_number] => 302842 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/302842
Chip error detector Jan 26, 1989 Issued
Array ( [id] => 2727121 [patent_doc_number] => 05008886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-16 [patent_title] => 'Read-modify-write operation' [patent_app_type] => 1 [patent_app_number] => 7/303621 [patent_app_country] => US [patent_app_date] => 1989-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2869 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/008/05008886.pdf [firstpage_image] =>[orig_patent_app_number] => 303621 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/303621
Read-modify-write operation Jan 26, 1989 Issued
Array ( [id] => 2720322 [patent_doc_number] => 05018147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Bit mask generator' [patent_app_type] => 1 [patent_app_number] => 7/301675 [patent_app_country] => US [patent_app_date] => 1989-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 3954 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/018/05018147.pdf [firstpage_image] =>[orig_patent_app_number] => 301675 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/301675
Bit mask generator Jan 25, 1989 Issued
Array ( [id] => 2606082 [patent_doc_number] => 04975914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-04 [patent_title] => 'Non-disruptive session recovery' [patent_app_type] => 1 [patent_app_number] => 7/301193 [patent_app_country] => US [patent_app_date] => 1989-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3214 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/975/04975914.pdf [firstpage_image] =>[orig_patent_app_number] => 301193 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/301193
Non-disruptive session recovery Jan 23, 1989 Issued
Array ( [id] => 2679009 [patent_doc_number] => 04955024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-04 [patent_title] => 'High speed image processing computer with error correction and logging' [patent_app_type] => 1 [patent_app_number] => 7/301372 [patent_app_country] => US [patent_app_date] => 1989-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 49 [patent_no_of_words] => 52854 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/955/04955024.pdf [firstpage_image] =>[orig_patent_app_number] => 301372 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/301372
High speed image processing computer with error correction and logging Jan 23, 1989 Issued
Array ( [id] => 2861134 [patent_doc_number] => 05089958 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-18 [patent_title] => 'Fault tolerant computer backup system' [patent_app_type] => 1 [patent_app_number] => 7/300469 [patent_app_country] => US [patent_app_date] => 1989-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9221 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/089/05089958.pdf [firstpage_image] =>[orig_patent_app_number] => 300469 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/300469
Fault tolerant computer backup system Jan 22, 1989 Issued
Array ( [id] => 2776406 [patent_doc_number] => 05007057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-09 [patent_title] => 'Power source monitor and a rotary encoder with such a monitor' [patent_app_type] => 1 [patent_app_number] => 7/298501 [patent_app_country] => US [patent_app_date] => 1989-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2720 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/007/05007057.pdf [firstpage_image] =>[orig_patent_app_number] => 298501 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/298501
Power source monitor and a rotary encoder with such a monitor Jan 17, 1989 Issued
Array ( [id] => 3108995 [patent_doc_number] => 05319648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-07 [patent_title] => 'Control flow reduction in selective repeat protocols' [patent_app_type] => 1 [patent_app_number] => 7/297441 [patent_app_country] => US [patent_app_date] => 1989-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6714 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/319/05319648.pdf [firstpage_image] =>[orig_patent_app_number] => 297441 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297441
Control flow reduction in selective repeat protocols Jan 12, 1989 Issued
07/295534 ERROR-CORRECTED FACSIMILE COMMUNICATION CONTROL SYSTEM Jan 10, 1989 Abandoned
Array ( [id] => 2637011 [patent_doc_number] => 04967414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-30 [patent_title] => 'LRU error detection using the collection of read and written LRU bits' [patent_app_type] => 1 [patent_app_number] => 7/294021 [patent_app_country] => US [patent_app_date] => 1989-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4485 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/967/04967414.pdf [firstpage_image] =>[orig_patent_app_number] => 294021 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/294021
LRU error detection using the collection of read and written LRU bits Jan 5, 1989 Issued
Array ( [id] => 2683366 [patent_doc_number] => 04984239 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-08 [patent_title] => 'Automatic verification system for maintenance/diagnosis facility in computer system' [patent_app_type] => 1 [patent_app_number] => 7/293492 [patent_app_country] => US [patent_app_date] => 1989-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2520 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/984/04984239.pdf [firstpage_image] =>[orig_patent_app_number] => 293492 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/293492
Automatic verification system for maintenance/diagnosis facility in computer system Jan 3, 1989 Issued
Array ( [id] => 2680541 [patent_doc_number] => 05048017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Watchdog timer' [patent_app_type] => 1 [patent_app_number] => 7/291500 [patent_app_country] => US [patent_app_date] => 1988-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2057 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/048/05048017.pdf [firstpage_image] =>[orig_patent_app_number] => 291500 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/291500
Watchdog timer Dec 28, 1988 Issued
Array ( [id] => 2668582 [patent_doc_number] => 04979174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-18 [patent_title] => 'Error correction and detection apparatus and method' [patent_app_type] => 1 [patent_app_number] => 7/291900 [patent_app_country] => US [patent_app_date] => 1988-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5750 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/979/04979174.pdf [firstpage_image] =>[orig_patent_app_number] => 291900 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/291900
Error correction and detection apparatus and method Dec 28, 1988 Issued
Array ( [id] => 2755623 [patent_doc_number] => 05003538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Communication network and protocol for real-time control of mailing machine operations' [patent_app_type] => 1 [patent_app_number] => 7/291471 [patent_app_country] => US [patent_app_date] => 1988-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 47 [patent_no_of_words] => 16288 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003538.pdf [firstpage_image] =>[orig_patent_app_number] => 291471 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/291471
Communication network and protocol for real-time control of mailing machine operations Dec 27, 1988 Issued
Array ( [id] => 2668547 [patent_doc_number] => 04979172 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-18 [patent_title] => 'Microcomputer' [patent_app_type] => 1 [patent_app_number] => 7/289803 [patent_app_country] => US [patent_app_date] => 1988-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2070 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/979/04979172.pdf [firstpage_image] =>[orig_patent_app_number] => 289803 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/289803
Microcomputer Dec 26, 1988 Issued
Array ( [id] => 2599254 [patent_doc_number] => 04970724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => 'Redundancy and testing techniques for IC wafers' [patent_app_type] => 1 [patent_app_number] => 7/288743 [patent_app_country] => US [patent_app_date] => 1988-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3613 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970724.pdf [firstpage_image] =>[orig_patent_app_number] => 288743 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/288743
Redundancy and testing techniques for IC wafers Dec 21, 1988 Issued
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