Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2641084 [patent_doc_number] => 04977559 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-11 [patent_title] => 'Improper bit combination detection circuit' [patent_app_type] => 1 [patent_app_number] => 7/286195 [patent_app_country] => US [patent_app_date] => 1988-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2588 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 768 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/977/04977559.pdf [firstpage_image] =>[orig_patent_app_number] => 286195 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/286195
Improper bit combination detection circuit Dec 18, 1988 Issued
Array ( [id] => 2735836 [patent_doc_number] => 05058113 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'Method and apparatus for correcting errors in a system' [patent_app_type] => 1 [patent_app_number] => 7/285441 [patent_app_country] => US [patent_app_date] => 1988-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3531 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/058/05058113.pdf [firstpage_image] =>[orig_patent_app_number] => 285441 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/285441
Method and apparatus for correcting errors in a system Dec 15, 1988 Issued
Array ( [id] => 2605809 [patent_doc_number] => 04965717 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-23 [patent_title] => 'Multiple processor system having shared memory with private-write capability' [patent_app_type] => 1 [patent_app_number] => 7/283573 [patent_app_country] => US [patent_app_date] => 1988-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 20827 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/965/04965717.pdf [firstpage_image] =>[orig_patent_app_number] => 283573 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/283573
Multiple processor system having shared memory with private-write capability Dec 12, 1988 Issued
Array ( [id] => 2665514 [patent_doc_number] => 04972412 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-20 [patent_title] => 'Delay time checking arrangement' [patent_app_type] => 1 [patent_app_number] => 7/283231 [patent_app_country] => US [patent_app_date] => 1988-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 19 [patent_no_of_words] => 2053 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/972/04972412.pdf [firstpage_image] =>[orig_patent_app_number] => 283231 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/283231
Delay time checking arrangement Dec 11, 1988 Issued
Array ( [id] => 2484836 [patent_doc_number] => 04872167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-03 [patent_title] => 'Method for displaying program executing circumstances and an apparatus using the same' [patent_app_type] => 1 [patent_app_number] => 7/282868 [patent_app_country] => US [patent_app_date] => 1988-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 6082 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/872/04872167.pdf [firstpage_image] =>[orig_patent_app_number] => 282868 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/282868
Method for displaying program executing circumstances and an apparatus using the same Dec 8, 1988 Issued
Array ( [id] => 2722770 [patent_doc_number] => 05010553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'High speed, error-free data transmission system and method' [patent_app_type] => 1 [patent_app_number] => 7/279914 [patent_app_country] => US [patent_app_date] => 1988-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 3696 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010553.pdf [firstpage_image] =>[orig_patent_app_number] => 279914 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/279914
High speed, error-free data transmission system and method Dec 4, 1988 Issued
Array ( [id] => 2565588 [patent_doc_number] => 04961193 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-02 [patent_title] => 'Extended errors correcting device having single package error correcting and double package error detecting codes' [patent_app_type] => 1 [patent_app_number] => 7/276583 [patent_app_country] => US [patent_app_date] => 1988-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 6985 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/961/04961193.pdf [firstpage_image] =>[orig_patent_app_number] => 276583 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/276583
Extended errors correcting device having single package error correcting and double package error detecting codes Nov 27, 1988 Issued
Array ( [id] => 2619223 [patent_doc_number] => 04903265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-20 [patent_title] => 'Method and apparatus for post-packaging testing of one-time programmable memories' [patent_app_type] => 1 [patent_app_number] => 7/276990 [patent_app_country] => US [patent_app_date] => 1988-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6007 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/903/04903265.pdf [firstpage_image] =>[orig_patent_app_number] => 276990 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/276990
Method and apparatus for post-packaging testing of one-time programmable memories Nov 27, 1988 Issued
Array ( [id] => 2641005 [patent_doc_number] => 04958347 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-18 [patent_title] => 'Apparatus, method and data structure for validation of kernel data bus' [patent_app_type] => 1 [patent_app_number] => 7/275185 [patent_app_country] => US [patent_app_date] => 1988-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5320 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/958/04958347.pdf [firstpage_image] =>[orig_patent_app_number] => 275185 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/275185
Apparatus, method and data structure for validation of kernel data bus Nov 22, 1988 Issued
Array ( [id] => 2708873 [patent_doc_number] => 04989207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-29 [patent_title] => 'Automatic verification of kernel circuitry based on analysis of memory accesses' [patent_app_type] => 1 [patent_app_number] => 7/275183 [patent_app_country] => US [patent_app_date] => 1988-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 5979 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/989/04989207.pdf [firstpage_image] =>[orig_patent_app_number] => 275183 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/275183
Automatic verification of kernel circuitry based on analysis of memory accesses Nov 22, 1988 Issued
Array ( [id] => 2595404 [patent_doc_number] => 04926374 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-15 [patent_title] => 'Residue checking apparatus for detecting errors in add, subtract, multiply, divide and square root operations' [patent_app_type] => 1 [patent_app_number] => 7/276200 [patent_app_country] => US [patent_app_date] => 1988-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3904 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/926/04926374.pdf [firstpage_image] =>[orig_patent_app_number] => 276200 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/276200
Residue checking apparatus for detecting errors in add, subtract, multiply, divide and square root operations Nov 22, 1988 Issued
Array ( [id] => 2755693 [patent_doc_number] => 05003542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Semiconductor memory device having error correcting circuit and method for correcting error' [patent_app_type] => 1 [patent_app_number] => 7/271491 [patent_app_country] => US [patent_app_date] => 1988-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5283 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003542.pdf [firstpage_image] =>[orig_patent_app_number] => 271491 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/271491
Semiconductor memory device having error correcting circuit and method for correcting error Nov 14, 1988 Issued
07/270713 ARRAYED DISK DRIVE SYSTEM AND METHOD Nov 13, 1988 Abandoned
Array ( [id] => 2779698 [patent_doc_number] => 04985895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-15 [patent_title] => 'Remote controlled receiving system apparatus and method' [patent_app_type] => 1 [patent_app_number] => 7/270143 [patent_app_country] => US [patent_app_date] => 1988-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/985/04985895.pdf [firstpage_image] =>[orig_patent_app_number] => 270143 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/270143
Remote controlled receiving system apparatus and method Nov 13, 1988 Issued
Array ( [id] => 2674598 [patent_doc_number] => 04947484 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-07 [patent_title] => 'Protocol for network having a plurality of intelligent cells' [patent_app_type] => 1 [patent_app_number] => 7/268933 [patent_app_country] => US [patent_app_date] => 1988-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 30 [patent_no_of_words] => 27324 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/947/04947484.pdf [firstpage_image] =>[orig_patent_app_number] => 268933 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/268933
Protocol for network having a plurality of intelligent cells Nov 7, 1988 Issued
Array ( [id] => 2759189 [patent_doc_number] => 05031179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Data communication apparatus' [patent_app_type] => 1 [patent_app_number] => 7/267541 [patent_app_country] => US [patent_app_date] => 1988-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 70 [patent_no_of_words] => 22671 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/031/05031179.pdf [firstpage_image] =>[orig_patent_app_number] => 267541 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/267541
Data communication apparatus Nov 3, 1988 Issued
Array ( [id] => 2598255 [patent_doc_number] => 04964127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-16 [patent_title] => 'Data validity checking means' [patent_app_type] => 1 [patent_app_number] => 7/266961 [patent_app_country] => US [patent_app_date] => 1988-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2860 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/964/04964127.pdf [firstpage_image] =>[orig_patent_app_number] => 266961 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/266961
Data validity checking means Nov 2, 1988 Issued
Array ( [id] => 2673000 [patent_doc_number] => 04947397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-07 [patent_title] => 'Job scheduler diagnostics' [patent_app_type] => 1 [patent_app_number] => 7/264772 [patent_app_country] => US [patent_app_date] => 1988-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5137 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/947/04947397.pdf [firstpage_image] =>[orig_patent_app_number] => 264772 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/264772
Job scheduler diagnostics Nov 1, 1988 Issued
Array ( [id] => 2776926 [patent_doc_number] => 05036518 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-30 [patent_title] => 'Guaranteed reliable broadcast network' [patent_app_type] => 1 [patent_app_number] => 7/266473 [patent_app_country] => US [patent_app_date] => 1988-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 82 [patent_no_of_words] => 26007 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/036/05036518.pdf [firstpage_image] =>[orig_patent_app_number] => 266473 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/266473
Guaranteed reliable broadcast network Nov 1, 1988 Issued
Array ( [id] => 2656065 [patent_doc_number] => 04980887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-25 [patent_title] => 'Digital communication apparatus and method' [patent_app_type] => 1 [patent_app_number] => 7/263170 [patent_app_country] => US [patent_app_date] => 1988-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/980/04980887.pdf [firstpage_image] =>[orig_patent_app_number] => 263170 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/263170
Digital communication apparatus and method Oct 26, 1988 Issued
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