Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2644529 [patent_doc_number] => 04953168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-28 [patent_title] => 'Digital signal recording apparatus' [patent_app_type] => 1 [patent_app_number] => 7/262523 [patent_app_country] => US [patent_app_date] => 1988-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 8071 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/953/04953168.pdf [firstpage_image] =>[orig_patent_app_number] => 262523 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/262523
Digital signal recording apparatus Oct 24, 1988 Issued
Array ( [id] => 2566837 [patent_doc_number] => 04942576 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-17 [patent_title] => 'Badbit counter for memory testing' [patent_app_type] => 1 [patent_app_number] => 7/261611 [patent_app_country] => US [patent_app_date] => 1988-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2033 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/942/04942576.pdf [firstpage_image] =>[orig_patent_app_number] => 261611 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/261611
Badbit counter for memory testing Oct 23, 1988 Issued
Array ( [id] => 2607670 [patent_doc_number] => 04924465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-08 [patent_title] => 'Memory with function test of error detection/correction device' [patent_app_type] => 1 [patent_app_number] => 7/260021 [patent_app_country] => US [patent_app_date] => 1988-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1980 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/924/04924465.pdf [firstpage_image] =>[orig_patent_app_number] => 260021 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/260021
Memory with function test of error detection/correction device Oct 19, 1988 Issued
Array ( [id] => 2539427 [patent_doc_number] => 04862463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-29 [patent_title] => 'Error correcting code for 8-bit-per-chip memory with reduced redundancy' [patent_app_type] => 1 [patent_app_number] => 7/258080 [patent_app_country] => US [patent_app_date] => 1988-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3970 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/862/04862463.pdf [firstpage_image] =>[orig_patent_app_number] => 258080 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/258080
Error correcting code for 8-bit-per-chip memory with reduced redundancy Oct 16, 1988 Issued
Array ( [id] => 2634472 [patent_doc_number] => 04920536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-24 [patent_title] => 'Error recovery scheme for destaging cache data in a multi-memory system' [patent_app_type] => 1 [patent_app_number] => 7/258202 [patent_app_country] => US [patent_app_date] => 1988-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3085 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/920/04920536.pdf [firstpage_image] =>[orig_patent_app_number] => 258202 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/258202
Error recovery scheme for destaging cache data in a multi-memory system Oct 13, 1988 Issued
Array ( [id] => 2607418 [patent_doc_number] => 04965800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-23 [patent_title] => 'Digital signal fault detector' [patent_app_type] => 1 [patent_app_number] => 7/255352 [patent_app_country] => US [patent_app_date] => 1988-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 12524 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/965/04965800.pdf [firstpage_image] =>[orig_patent_app_number] => 255352 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/255352
Digital signal fault detector Oct 10, 1988 Issued
Array ( [id] => 2653093 [patent_doc_number] => 04939730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-03 [patent_title] => 'Auto isolation circuit for malfunctioning current loop' [patent_app_type] => 1 [patent_app_number] => 7/255701 [patent_app_country] => US [patent_app_date] => 1988-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4353 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/939/04939730.pdf [firstpage_image] =>[orig_patent_app_number] => 255701 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/255701
Auto isolation circuit for malfunctioning current loop Oct 10, 1988 Issued
Array ( [id] => 2644448 [patent_doc_number] => 04953164 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-28 [patent_title] => 'Cache memory system having error correcting circuit' [patent_app_type] => 1 [patent_app_number] => 7/254233 [patent_app_country] => US [patent_app_date] => 1988-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/953/04953164.pdf [firstpage_image] =>[orig_patent_app_number] => 254233 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/254233
Cache memory system having error correcting circuit Oct 5, 1988 Issued
Array ( [id] => 2641127 [patent_doc_number] => 04958352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-18 [patent_title] => 'Semiconductor memory device with error check and correcting function' [patent_app_type] => 1 [patent_app_number] => 7/253001 [patent_app_country] => US [patent_app_date] => 1988-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6780 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/958/04958352.pdf [firstpage_image] =>[orig_patent_app_number] => 253001 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/253001
Semiconductor memory device with error check and correcting function Oct 3, 1988 Issued
Array ( [id] => 2565531 [patent_doc_number] => 04961190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-02 [patent_title] => '(1+N) Hitless channel switching system' [patent_app_type] => 1 [patent_app_number] => 7/251643 [patent_app_country] => US [patent_app_date] => 1988-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1798 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/961/04961190.pdf [firstpage_image] =>[orig_patent_app_number] => 251643 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/251643
(1+N) Hitless channel switching system Oct 2, 1988 Issued
Array ( [id] => 2598237 [patent_doc_number] => 04964126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-16 [patent_title] => 'Fault tolerant signal processing machine and method' [patent_app_type] => 1 [patent_app_number] => 7/251572 [patent_app_country] => US [patent_app_date] => 1988-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 14347 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/964/04964126.pdf [firstpage_image] =>[orig_patent_app_number] => 251572 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/251572
Fault tolerant signal processing machine and method Sep 29, 1988 Issued
Array ( [id] => 2653146 [patent_doc_number] => 04939733 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-03 [patent_title] => 'Syndrome generator for Hamming code and method for generating syndrome for Hamming code' [patent_app_type] => 1 [patent_app_number] => 7/247293 [patent_app_country] => US [patent_app_date] => 1988-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7168 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/939/04939733.pdf [firstpage_image] =>[orig_patent_app_number] => 247293 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/247293
Syndrome generator for Hamming code and method for generating syndrome for Hamming code Sep 21, 1988 Issued
Array ( [id] => 2653204 [patent_doc_number] => 04939736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-03 [patent_title] => 'Protection against loss or corruption of data upon switchover of a replicated system' [patent_app_type] => 1 [patent_app_number] => 7/247962 [patent_app_country] => US [patent_app_date] => 1988-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2627 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/939/04939736.pdf [firstpage_image] =>[orig_patent_app_number] => 247962 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/247962
Protection against loss or corruption of data upon switchover of a replicated system Sep 21, 1988 Issued
Array ( [id] => 2640115 [patent_doc_number] => 04916701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-10 [patent_title] => 'Method and system for correcting long bursts of consecutive errors' [patent_app_type] => 1 [patent_app_number] => 7/247461 [patent_app_country] => US [patent_app_date] => 1988-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2776 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/916/04916701.pdf [firstpage_image] =>[orig_patent_app_number] => 247461 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/247461
Method and system for correcting long bursts of consecutive errors Sep 20, 1988 Issued
Array ( [id] => 2603323 [patent_doc_number] => 04918696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-17 [patent_title] => 'Bank initiate error detection' [patent_app_type] => 1 [patent_app_number] => 7/245600 [patent_app_country] => US [patent_app_date] => 1988-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 766 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/918/04918696.pdf [firstpage_image] =>[orig_patent_app_number] => 245600 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/245600
Bank initiate error detection Sep 18, 1988 Issued
Array ( [id] => 2703592 [patent_doc_number] => 04996688 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-26 [patent_title] => 'Fault capture/fault injection system' [patent_app_type] => 1 [patent_app_number] => 7/246512 [patent_app_country] => US [patent_app_date] => 1988-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4053 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/996/04996688.pdf [firstpage_image] =>[orig_patent_app_number] => 246512 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/246512
Fault capture/fault injection system Sep 18, 1988 Issued
Array ( [id] => 2637031 [patent_doc_number] => 04967415 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-30 [patent_title] => 'EEPROM system with bit error detecting function' [patent_app_type] => 1 [patent_app_number] => 7/245296 [patent_app_country] => US [patent_app_date] => 1988-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4605 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/967/04967415.pdf [firstpage_image] =>[orig_patent_app_number] => 245296 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/245296
EEPROM system with bit error detecting function Sep 15, 1988 Issued
Array ( [id] => 2598182 [patent_doc_number] => 04964123 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-16 [patent_title] => 'Resetting circuit for a microcomputer' [patent_app_type] => 1 [patent_app_number] => 7/244890 [patent_app_country] => US [patent_app_date] => 1988-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1885 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/964/04964123.pdf [firstpage_image] =>[orig_patent_app_number] => 244890 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/244890
Resetting circuit for a microcomputer Sep 14, 1988 Issued
Array ( [id] => 2607455 [patent_doc_number] => 04965802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-23 [patent_title] => 'Memory arrangement utilized for IC card' [patent_app_type] => 1 [patent_app_number] => 7/244861 [patent_app_country] => US [patent_app_date] => 1988-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/965/04965802.pdf [firstpage_image] =>[orig_patent_app_number] => 244861 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/244861
Memory arrangement utilized for IC card Sep 14, 1988 Issued
Array ( [id] => 2664978 [patent_doc_number] => 04962501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-09 [patent_title] => 'Bus data transmission verification system' [patent_app_type] => 1 [patent_app_number] => 7/244187 [patent_app_country] => US [patent_app_date] => 1988-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4034 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/962/04962501.pdf [firstpage_image] =>[orig_patent_app_number] => 244187 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/244187
Bus data transmission verification system Sep 12, 1988 Issued
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