Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2596008 [patent_doc_number] => 04908827 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-13 [patent_title] => 'Forward error correction system' [patent_app_type] => 1 [patent_app_number] => 7/077800 [patent_app_country] => US [patent_app_date] => 1987-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5767 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/908/04908827.pdf [firstpage_image] =>[orig_patent_app_number] => 077800 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/077800
Forward error correction system Jul 26, 1987 Issued
07/075390 ERROR CORRECTING CODE FOR B-BIT-PER-CHIP MEMORY WITH REDUCED REDUNDANCY Jul 19, 1987 Abandoned
Array ( [id] => 2520809 [patent_doc_number] => 04831623 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-16 [patent_title] => 'Swap scan testing of digital logic' [patent_app_type] => 1 [patent_app_number] => 7/074101 [patent_app_country] => US [patent_app_date] => 1987-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4848 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/831/04831623.pdf [firstpage_image] =>[orig_patent_app_number] => 074101 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/074101
Swap scan testing of digital logic Jul 15, 1987 Issued
Array ( [id] => 2573464 [patent_doc_number] => 04835776 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-30 [patent_title] => 'Communication filter' [patent_app_type] => 1 [patent_app_number] => 7/073532 [patent_app_country] => US [patent_app_date] => 1987-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4158 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/835/04835776.pdf [firstpage_image] =>[orig_patent_app_number] => 073532 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/073532
Communication filter Jul 14, 1987 Issued
Array ( [id] => 2525513 [patent_doc_number] => 04852104 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-25 [patent_title] => 'Solid-state reader device for a cumulative operations measurement system' [patent_app_type] => 1 [patent_app_number] => 7/071801 [patent_app_country] => US [patent_app_date] => 1987-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 8157 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/852/04852104.pdf [firstpage_image] =>[orig_patent_app_number] => 071801 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/071801
Solid-state reader device for a cumulative operations measurement system Jul 9, 1987 Issued
Array ( [id] => 2466087 [patent_doc_number] => 04785453 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-15 [patent_title] => 'High level self-checking intelligent I/O controller' [patent_app_type] => 1 [patent_app_number] => 7/068732 [patent_app_country] => US [patent_app_date] => 1987-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6328 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/785/04785453.pdf [firstpage_image] =>[orig_patent_app_number] => 068732 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/068732
High level self-checking intelligent I/O controller Jun 29, 1987 Issued
Array ( [id] => 2528808 [patent_doc_number] => 04864570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-05 [patent_title] => 'Processing pulse control circuit for use in device performing signature analysis of digital circuits' [patent_app_type] => 1 [patent_app_number] => 7/067181 [patent_app_country] => US [patent_app_date] => 1987-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 19 [patent_no_of_words] => 4613 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/864/04864570.pdf [firstpage_image] =>[orig_patent_app_number] => 067181 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/067181
Processing pulse control circuit for use in device performing signature analysis of digital circuits Jun 28, 1987 Issued
Array ( [id] => 2504645 [patent_doc_number] => 04847838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-11 [patent_title] => 'Circuit for testing the bus structure of a printed wiring card' [patent_app_type] => 1 [patent_app_number] => 7/064489 [patent_app_country] => US [patent_app_date] => 1987-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2796 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/847/04847838.pdf [firstpage_image] =>[orig_patent_app_number] => 064489 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/064489
Circuit for testing the bus structure of a printed wiring card Jun 21, 1987 Issued
Array ( [id] => 2451770 [patent_doc_number] => 04792950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-20 [patent_title] => 'Multiplex wiring system' [patent_app_type] => 1 [patent_app_number] => 7/063333 [patent_app_country] => US [patent_app_date] => 1987-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3054 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/792/04792950.pdf [firstpage_image] =>[orig_patent_app_number] => 063333 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/063333
Multiplex wiring system Jun 16, 1987 Issued
Array ( [id] => 2525440 [patent_doc_number] => 04852100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-25 [patent_title] => 'Error detection and correction scheme for main storage unit' [patent_app_type] => 1 [patent_app_number] => 7/061847 [patent_app_country] => US [patent_app_date] => 1987-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10631 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/852/04852100.pdf [firstpage_image] =>[orig_patent_app_number] => 061847 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/061847
Error detection and correction scheme for main storage unit Jun 10, 1987 Issued
Array ( [id] => 2597269 [patent_doc_number] => 04928281 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-22 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/060331 [patent_app_country] => US [patent_app_date] => 1987-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9987 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/928/04928281.pdf [firstpage_image] =>[orig_patent_app_number] => 060331 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/060331
Semiconductor memory Jun 9, 1987 Issued
Array ( [id] => 2499867 [patent_doc_number] => 04829519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-09 [patent_title] => 'Automatic cell transfer system with error rate assessment' [patent_app_type] => 1 [patent_app_number] => 7/061191 [patent_app_country] => US [patent_app_date] => 1987-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2973 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/829/04829519.pdf [firstpage_image] =>[orig_patent_app_number] => 061191 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/061191
Automatic cell transfer system with error rate assessment Jun 8, 1987 Issued
Array ( [id] => 2478358 [patent_doc_number] => 04845713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-04 [patent_title] => 'Method and apparatus for determining the coefficients of a locator polynomial' [patent_app_type] => 1 [patent_app_number] => 7/059642 [patent_app_country] => US [patent_app_date] => 1987-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 16204 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/845/04845713.pdf [firstpage_image] =>[orig_patent_app_number] => 059642 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/059642
Method and apparatus for determining the coefficients of a locator polynomial Jun 7, 1987 Issued
Array ( [id] => 2498895 [patent_doc_number] => 04802171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-31 [patent_title] => 'Method for error correction in digitally encoded speech' [patent_app_type] => 1 [patent_app_number] => 7/058202 [patent_app_country] => US [patent_app_date] => 1987-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2443 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/802/04802171.pdf [firstpage_image] =>[orig_patent_app_number] => 058202 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/058202
Method for error correction in digitally encoded speech Jun 3, 1987 Issued
Array ( [id] => 2528850 [patent_doc_number] => 04864572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-05 [patent_title] => 'Framing bitstreams' [patent_app_type] => 1 [patent_app_number] => 7/053823 [patent_app_country] => US [patent_app_date] => 1987-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3229 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/864/04864572.pdf [firstpage_image] =>[orig_patent_app_number] => 053823 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/053823
Framing bitstreams May 25, 1987 Issued
Array ( [id] => 2575310 [patent_doc_number] => 04858233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-15 [patent_title] => 'Redundancy scheme for multi-stage apparatus' [patent_app_type] => 1 [patent_app_number] => 7/052250 [patent_app_country] => US [patent_app_date] => 1987-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7066 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/858/04858233.pdf [firstpage_image] =>[orig_patent_app_number] => 052250 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/052250
Redundancy scheme for multi-stage apparatus May 18, 1987 Issued
Array ( [id] => 2401127 [patent_doc_number] => 04782486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-01 [patent_title] => 'Self-testing memory' [patent_app_type] => 1 [patent_app_number] => 7/049812 [patent_app_country] => US [patent_app_date] => 1987-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9391 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/782/04782486.pdf [firstpage_image] =>[orig_patent_app_number] => 049812 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/049812
Self-testing memory May 13, 1987 Issued
Array ( [id] => 2525310 [patent_doc_number] => 04819234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-04 [patent_title] => 'Operating system debugger' [patent_app_type] => 1 [patent_app_number] => 7/046082 [patent_app_country] => US [patent_app_date] => 1987-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 7145 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/819/04819234.pdf [firstpage_image] =>[orig_patent_app_number] => 046082 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/046082
Operating system debugger Apr 30, 1987 Issued
Array ( [id] => 2401164 [patent_doc_number] => 04782488 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-01 [patent_title] => 'Digital signal scrambler' [patent_app_type] => 1 [patent_app_number] => 7/044103 [patent_app_country] => US [patent_app_date] => 1987-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3523 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/782/04782488.pdf [firstpage_image] =>[orig_patent_app_number] => 044103 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/044103
Digital signal scrambler Apr 28, 1987 Issued
Array ( [id] => 2493642 [patent_doc_number] => 04800562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-24 [patent_title] => 'Circuit and method for monitoring the quality of data in a data stream' [patent_app_type] => 1 [patent_app_number] => 7/043273 [patent_app_country] => US [patent_app_date] => 1987-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1683 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/800/04800562.pdf [firstpage_image] =>[orig_patent_app_number] => 043273 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/043273
Circuit and method for monitoring the quality of data in a data stream Apr 26, 1987 Issued
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