
Sara Elizabeth Townsley
Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )
| Most Active Art Unit | 1629 |
| Art Unit(s) | 1629, 1612, 1613 |
| Total Applications | 514 |
| Issued Applications | 97 |
| Pending Applications | 81 |
| Abandoned Applications | 352 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2351630
[patent_doc_number] => 04656593
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-07
[patent_title] => 'Multi-function load controller for carrier load control subsystem'
[patent_app_type] => 1
[patent_app_number] => 6/736171
[patent_app_country] => US
[patent_app_date] => 1985-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 9705
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/656/04656593.pdf
[firstpage_image] =>[orig_patent_app_number] => 736171
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/736171 | Multi-function load controller for carrier load control subsystem | May 19, 1985 | Issued |
Array
(
[id] => 2225542
[patent_doc_number] => 04631724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-12-23
[patent_title] => 'Semiconductor memory test equipment'
[patent_app_type] => 1
[patent_app_number] => 6/734109
[patent_app_country] => US
[patent_app_date] => 1985-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5179
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/631/04631724.pdf
[firstpage_image] =>[orig_patent_app_number] => 734109
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/734109 | Semiconductor memory test equipment | May 14, 1985 | Issued |
| 06/733679 | HIGH LEVEL SELF-CHECKING INTELLIGENT I/O CONTROLLER | May 9, 1985 | Abandoned |
Array
(
[id] => 2345547
[patent_doc_number] => 04669082
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-26
[patent_title] => 'Method of testing and addressing a magnetic core memory'
[patent_app_type] => 1
[patent_app_number] => 6/732468
[patent_app_country] => US
[patent_app_date] => 1985-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 45
[patent_no_of_words] => 20023
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/669/04669082.pdf
[firstpage_image] =>[orig_patent_app_number] => 732468
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/732468 | Method of testing and addressing a magnetic core memory | May 8, 1985 | Issued |
Array
(
[id] => 2266379
[patent_doc_number] => 04598403
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-07-01
[patent_title] => 'Encoding method for error correction'
[patent_app_type] => 1
[patent_app_number] => 6/731339
[patent_app_country] => US
[patent_app_date] => 1985-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3860
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/598/04598403.pdf
[firstpage_image] =>[orig_patent_app_number] => 731339
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/731339 | Encoding method for error correction | May 5, 1985 | Issued |
Array
(
[id] => 2249214
[patent_doc_number] => 04577319
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-03-18
[patent_title] => 'Error flag processor'
[patent_app_type] => 1
[patent_app_number] => 6/730258
[patent_app_country] => US
[patent_app_date] => 1985-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 4919
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/577/04577319.pdf
[firstpage_image] =>[orig_patent_app_number] => 730258
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/730258 | Error flag processor | May 5, 1985 | Issued |
Array
(
[id] => 2361407
[patent_doc_number] => 04688226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-08-18
[patent_title] => 'Code error overlaying in digital transmission signals'
[patent_app_type] => 1
[patent_app_number] => 6/730449
[patent_app_country] => US
[patent_app_date] => 1985-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 4355
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/688/04688226.pdf
[firstpage_image] =>[orig_patent_app_number] => 730449
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/730449 | Code error overlaying in digital transmission signals | May 5, 1985 | Issued |
Array
(
[id] => 2364840
[patent_doc_number] => 04667328
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-19
[patent_title] => 'Clocking circuit with back-up clock source'
[patent_app_type] => 1
[patent_app_number] => 6/728050
[patent_app_country] => US
[patent_app_date] => 1985-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3371
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/667/04667328.pdf
[firstpage_image] =>[orig_patent_app_number] => 728050
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/728050 | Clocking circuit with back-up clock source | Apr 28, 1985 | Issued |
Array
(
[id] => 2299971
[patent_doc_number] => 04660202
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-21
[patent_title] => 'Error protection method for packeted data'
[patent_app_type] => 1
[patent_app_number] => 6/728119
[patent_app_country] => US
[patent_app_date] => 1985-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 4965
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/660/04660202.pdf
[firstpage_image] =>[orig_patent_app_number] => 728119
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/728119 | Error protection method for packeted data | Apr 28, 1985 | Issued |
Array
(
[id] => 2347110
[patent_doc_number] => 04713817
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-12-15
[patent_title] => 'Multidimensional, convolutionally coded communication systems'
[patent_app_type] => 1
[patent_app_number] => 6/727398
[patent_app_country] => US
[patent_app_date] => 1985-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 24
[patent_no_of_words] => 20110
[patent_no_of_claims] => 82
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/713/04713817.pdf
[firstpage_image] =>[orig_patent_app_number] => 727398
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/727398 | Multidimensional, convolutionally coded communication systems | Apr 24, 1985 | Issued |
Array
(
[id] => 2335791
[patent_doc_number] => 04672611
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-09
[patent_title] => 'Serial transmission line monitoring device'
[patent_app_type] => 1
[patent_app_number] => 6/725172
[patent_app_country] => US
[patent_app_date] => 1985-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 7054
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/672/04672611.pdf
[firstpage_image] =>[orig_patent_app_number] => 725172
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/725172 | Serial transmission line monitoring device | Apr 18, 1985 | Issued |
Array
(
[id] => 2331695
[patent_doc_number] => 04680764
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-07-14
[patent_title] => 'Method and apparatus for transmitting digital data'
[patent_app_type] => 1
[patent_app_number] => 6/714892
[patent_app_country] => US
[patent_app_date] => 1985-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 8034
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/680/04680764.pdf
[firstpage_image] =>[orig_patent_app_number] => 714892
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/714892 | Method and apparatus for transmitting digital data | Mar 21, 1985 | Issued |
Array
(
[id] => 2352233
[patent_doc_number] => 04656633
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-07
[patent_title] => 'Error concealment system'
[patent_app_type] => 1
[patent_app_number] => 6/712560
[patent_app_country] => US
[patent_app_date] => 1985-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 7689
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/656/04656633.pdf
[firstpage_image] =>[orig_patent_app_number] => 712560
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/712560 | Error concealment system | Mar 14, 1985 | Issued |
Array
(
[id] => 2299945
[patent_doc_number] => 04660201
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-21
[patent_title] => 'Failure notice system in a data transmission system'
[patent_app_type] => 1
[patent_app_number] => 6/711430
[patent_app_country] => US
[patent_app_date] => 1985-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 2699
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 319
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/660/04660201.pdf
[firstpage_image] =>[orig_patent_app_number] => 711430
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/711430 | Failure notice system in a data transmission system | Mar 12, 1985 | Issued |
Array
(
[id] => 2286767
[patent_doc_number] => 04620304
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-10-28
[patent_title] => 'Method of and apparatus for multiplexed automatic testing of electronic circuits and the like'
[patent_app_type] => 1
[patent_app_number] => 6/710535
[patent_app_country] => US
[patent_app_date] => 1985-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5273
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/620/04620304.pdf
[firstpage_image] =>[orig_patent_app_number] => 710535
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/710535 | Method of and apparatus for multiplexed automatic testing of electronic circuits and the like | Mar 12, 1985 | Issued |
| 06/710943 | ENCODER INTERFACE WITH ERROR DETECTION AND METHOD THEREFOR | Mar 12, 1985 | Abandoned |
Array
(
[id] => 2317687
[patent_doc_number] => 04675869
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-23
[patent_title] => 'Fast decoder and encoder for Reed-Solomon codes and recording/playback apparatus having such an encoder/decoder'
[patent_app_type] => 1
[patent_app_number] => 6/705752
[patent_app_country] => US
[patent_app_date] => 1985-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 10198
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/675/04675869.pdf
[firstpage_image] =>[orig_patent_app_number] => 705752
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/705752 | Fast decoder and encoder for Reed-Solomon codes and recording/playback apparatus having such an encoder/decoder | Feb 25, 1985 | Issued |
Array
(
[id] => 2310201
[patent_doc_number] => 04691316
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-09-01
[patent_title] => 'ROM emulator for diagnostic tester'
[patent_app_type] => 1
[patent_app_number] => 6/701770
[patent_app_country] => US
[patent_app_date] => 1985-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3043
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[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/691/04691316.pdf
[firstpage_image] =>[orig_patent_app_number] => 701770
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/701770 | ROM emulator for diagnostic tester | Feb 13, 1985 | Issued |
Array
(
[id] => 2421705
[patent_doc_number] => 04726026
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-02-16
[patent_title] => 'Fault-tolerant voted output system'
[patent_app_type] => 1
[patent_app_number] => 6/699751
[patent_app_country] => US
[patent_app_date] => 1985-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 16
[patent_no_of_words] => 3801
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[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/726/04726026.pdf
[firstpage_image] =>[orig_patent_app_number] => 699751
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/699751 | Fault-tolerant voted output system | Feb 7, 1985 | Issued |
Array
(
[id] => 2352200
[patent_doc_number] => 04656631
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-07
[patent_title] => 'Process and circuit arrangement for checking a program in data processing units'
[patent_app_type] => 1
[patent_app_number] => 6/698801
[patent_app_country] => US
[patent_app_date] => 1985-02-06
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/656/04656631.pdf
[firstpage_image] =>[orig_patent_app_number] => 698801
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/698801 | Process and circuit arrangement for checking a program in data processing units | Feb 5, 1985 | Issued |