Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2337259 [patent_doc_number] => 04635259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-06 [patent_title] => 'Method and apparatus for monitoring response signals during automated testing of electronic circuits' [patent_app_type] => 1 [patent_app_number] => 6/611448 [patent_app_country] => US [patent_app_date] => 1984-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5179 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/635/04635259.pdf [firstpage_image] =>[orig_patent_app_number] => 611448 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/611448
Method and apparatus for monitoring response signals during automated testing of electronic circuits May 16, 1984 Issued
Array ( [id] => 2332274 [patent_doc_number] => 04637020 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'Method and apparatus for monitoring automated testing of electronic circuits' [patent_app_type] => 1 [patent_app_number] => 6/611449 [patent_app_country] => US [patent_app_date] => 1984-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10292 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/637/04637020.pdf [firstpage_image] =>[orig_patent_app_number] => 611449 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/611449
Method and apparatus for monitoring automated testing of electronic circuits May 16, 1984 Issued
Array ( [id] => 2359238 [patent_doc_number] => 04654852 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-31 [patent_title] => 'On-line problem-determination procedure for diagnosis of faults in a data-processing system' [patent_app_type] => 1 [patent_app_number] => 6/610441 [patent_app_country] => US [patent_app_date] => 1984-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 5858 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/654/04654852.pdf [firstpage_image] =>[orig_patent_app_number] => 610441 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/610441
On-line problem-determination procedure for diagnosis of faults in a data-processing system May 14, 1984 Issued
Array ( [id] => 2337274 [patent_doc_number] => 04635260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-06 [patent_title] => 'Data transmission telemonitoring equipment and system' [patent_app_type] => 1 [patent_app_number] => 6/609881 [patent_app_country] => US [patent_app_date] => 1984-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3267 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/635/04635260.pdf [firstpage_image] =>[orig_patent_app_number] => 609881 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/609881
Data transmission telemonitoring equipment and system May 13, 1984 Issued
Array ( [id] => 2291289 [patent_doc_number] => 04604747 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Error correcting and controlling system' [patent_app_type] => 1 [patent_app_number] => 6/609854 [patent_app_country] => US [patent_app_date] => 1984-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5475 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 656 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604747.pdf [firstpage_image] =>[orig_patent_app_number] => 609854 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/609854
Error correcting and controlling system May 13, 1984 Issued
Array ( [id] => 2263514 [patent_doc_number] => 04618953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-21 [patent_title] => 'Watchdog circuit' [patent_app_type] => 1 [patent_app_number] => 6/605733 [patent_app_country] => US [patent_app_date] => 1984-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2401 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/618/04618953.pdf [firstpage_image] =>[orig_patent_app_number] => 605733 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/605733
Watchdog circuit Apr 30, 1984 Issued
Array ( [id] => 2252477 [patent_doc_number] => 04633466 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-30 [patent_title] => 'Self testing data processing system with processor independent test program' [patent_app_type] => 1 [patent_app_number] => 6/605752 [patent_app_country] => US [patent_app_date] => 1984-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6639 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/633/04633466.pdf [firstpage_image] =>[orig_patent_app_number] => 605752 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/605752
Self testing data processing system with processor independent test program Apr 30, 1984 Issued
Array ( [id] => 2318415 [patent_doc_number] => 04646298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-24 [patent_title] => 'Self testing data processing system with system test master arbitration' [patent_app_type] => 1 [patent_app_number] => 6/605751 [patent_app_country] => US [patent_app_date] => 1984-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6995 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/646/04646298.pdf [firstpage_image] =>[orig_patent_app_number] => 605751 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/605751
Self testing data processing system with system test master arbitration Apr 30, 1984 Issued
Array ( [id] => 2230303 [patent_doc_number] => 04625310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-25 [patent_title] => 'Universally testable logic elements and method for structural testing of logic circuits formed of such logic elements' [patent_app_type] => 1 [patent_app_number] => 6/602830 [patent_app_country] => US [patent_app_date] => 1984-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 7067 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/625/04625310.pdf [firstpage_image] =>[orig_patent_app_number] => 602830 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/602830
Universally testable logic elements and method for structural testing of logic circuits formed of such logic elements Apr 22, 1984 Issued
Array ( [id] => 2228084 [patent_doc_number] => 04628510 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-09 [patent_title] => 'Memory device' [patent_app_type] => 1 [patent_app_number] => 6/601720 [patent_app_country] => US [patent_app_date] => 1984-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5984 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/628/04628510.pdf [firstpage_image] =>[orig_patent_app_number] => 601720 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/601720
Memory device Apr 17, 1984 Issued
Array ( [id] => 2228027 [patent_doc_number] => 04628507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-09 [patent_title] => 'Bit error detection circuit for PSK-modulated carrier wave' [patent_app_type] => 1 [patent_app_number] => 6/599362 [patent_app_country] => US [patent_app_date] => 1984-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3006 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/628/04628507.pdf [firstpage_image] =>[orig_patent_app_number] => 599362 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/599362
Bit error detection circuit for PSK-modulated carrier wave Apr 11, 1984 Issued
Array ( [id] => 2198603 [patent_doc_number] => 04502140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-02-26 [patent_title] => 'GO/NO GO margin test circuit for semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/599208 [patent_app_country] => US [patent_app_date] => 1984-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 7625 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/502/04502140.pdf [firstpage_image] =>[orig_patent_app_number] => 599208 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/599208
GO/NO GO margin test circuit for semiconductor memory Apr 11, 1984 Issued
Array ( [id] => 2221152 [patent_doc_number] => 04615030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-30 [patent_title] => 'Semiconductor memory device with self correction circuit' [patent_app_type] => 1 [patent_app_number] => 6/596281 [patent_app_country] => US [patent_app_date] => 1984-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3688 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/615/04615030.pdf [firstpage_image] =>[orig_patent_app_number] => 596281 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/596281
Semiconductor memory device with self correction circuit Apr 2, 1984 Issued
06/596812 SEMICONDUCTOR MEMORY DEVICE Apr 2, 1984 Abandoned
Array ( [id] => 2287554 [patent_doc_number] => 04627053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-02 [patent_title] => 'Method of repairing semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/595411 [patent_app_country] => US [patent_app_date] => 1984-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 5026 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/627/04627053.pdf [firstpage_image] =>[orig_patent_app_number] => 595411 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/595411
Method of repairing semiconductor memory Mar 29, 1984 Issued
Array ( [id] => 2246483 [patent_doc_number] => 04608691 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-26 [patent_title] => 'Signature analyzer card' [patent_app_type] => 1 [patent_app_number] => 6/591090 [patent_app_country] => US [patent_app_date] => 1984-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9966 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/608/04608691.pdf [firstpage_image] =>[orig_patent_app_number] => 591090 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/591090
Signature analyzer card Mar 18, 1984 Issued
Array ( [id] => 2253836 [patent_doc_number] => 04606028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-12 [patent_title] => 'Digital transmission system' [patent_app_type] => 1 [patent_app_number] => 6/589901 [patent_app_country] => US [patent_app_date] => 1984-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4588 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/606/04606028.pdf [firstpage_image] =>[orig_patent_app_number] => 589901 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/589901
Digital transmission system Mar 13, 1984 Issued
Array ( [id] => 2247321 [patent_doc_number] => 04617660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-14 [patent_title] => 'Faulty-memory processing method and apparatus' [patent_app_type] => 1 [patent_app_number] => 6/587518 [patent_app_country] => US [patent_app_date] => 1984-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6485 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/617/04617660.pdf [firstpage_image] =>[orig_patent_app_number] => 587518 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/587518
Faulty-memory processing method and apparatus Mar 7, 1984 Issued
90/000518 SERIAL DATA BUS FOR USE IN A MULTIPROCESSOR PARCEL POSTAGE METERING SYSTEM Mar 1, 1984 Issued
Array ( [id] => 2094303 [patent_doc_number] => 04464756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-08-07 [patent_title] => 'System for error detection in frequency shift keyed signals' [patent_app_type] => 1 [patent_app_number] => 6/582869 [patent_app_country] => US [patent_app_date] => 1984-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1286 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/464/04464756.pdf [firstpage_image] =>[orig_patent_app_number] => 582869 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/582869
System for error detection in frequency shift keyed signals Feb 26, 1984 Issued
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