Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1982258 [patent_doc_number] => 04328584 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-05-04 [patent_title] => 'Method and arrangement for supervising signal amplitude converters' [patent_app_type] => 1 [patent_app_number] => 6/129636 [patent_app_country] => US [patent_app_date] => 1980-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2347 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/328/04328584.pdf [firstpage_image] =>[orig_patent_app_number] => 129636 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/129636
Method and arrangement for supervising signal amplitude converters Mar 11, 1980 Issued
Array ( [id] => 1968699 [patent_doc_number] => 04320511 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-16 [patent_title] => 'Method and device for conversion between a cyclic and a general code sequence by the use of dummy zero bit series' [patent_app_type] => 1 [patent_app_number] => 6/129486 [patent_app_country] => US [patent_app_date] => 1980-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6916 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/320/04320511.pdf [firstpage_image] =>[orig_patent_app_number] => 129486 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/129486
Method and device for conversion between a cyclic and a general code sequence by the use of dummy zero bit series Mar 10, 1980 Issued
Array ( [id] => 1939984 [patent_doc_number] => 04322847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-30 [patent_title] => 'Automatic indirect testing to verify operational control' [patent_app_type] => 1 [patent_app_number] => 6/128685 [patent_app_country] => US [patent_app_date] => 1980-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3498 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/322/04322847.pdf [firstpage_image] =>[orig_patent_app_number] => 128685 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/128685
Automatic indirect testing to verify operational control Mar 9, 1980 Issued
Array ( [id] => 1997384 [patent_doc_number] => 04345327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-17 [patent_title] => 'Self-monitored process control device' [patent_app_type] => 1 [patent_app_number] => 6/193268 [patent_app_country] => US [patent_app_date] => 1980-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2144 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/345/04345327.pdf [firstpage_image] =>[orig_patent_app_number] => 193268 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/193268
Self-monitored process control device Mar 6, 1980 Issued
Array ( [id] => 1952187 [patent_doc_number] => 04313201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-26 [patent_title] => 'Tested, dissimilar helicopter stability augmentation' [patent_app_type] => 1 [patent_app_number] => 6/127332 [patent_app_country] => US [patent_app_date] => 1980-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6241 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 421 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/313/04313201.pdf [firstpage_image] =>[orig_patent_app_number] => 127332 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/127332
Tested, dissimilar helicopter stability augmentation Mar 4, 1980 Issued
Array ( [id] => 1988446 [patent_doc_number] => 04346473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-24 [patent_title] => 'Error correction coding method and apparatus for multilevel signaling' [patent_app_type] => 1 [patent_app_number] => 6/125084 [patent_app_country] => US [patent_app_date] => 1980-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3494 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/346/04346473.pdf [firstpage_image] =>[orig_patent_app_number] => 125084 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/125084
Error correction coding method and apparatus for multilevel signaling Feb 25, 1980 Issued
Array ( [id] => 1984277 [patent_doc_number] => 04356564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-26 [patent_title] => 'Digital signal transmission system with encoding and decoding sections for correcting errors by parity signals transmitted with digital information signals' [patent_app_type] => 1 [patent_app_number] => 6/123721 [patent_app_country] => US [patent_app_date] => 1980-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 4909 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/356/04356564.pdf [firstpage_image] =>[orig_patent_app_number] => 123721 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/123721
Digital signal transmission system with encoding and decoding sections for correcting errors by parity signals transmitted with digital information signals Feb 21, 1980 Issued
Array ( [id] => 1906948 [patent_doc_number] => 04307463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-12-22 [patent_title] => 'Vital rate decoder' [patent_app_type] => 1 [patent_app_number] => 6/119655 [patent_app_country] => US [patent_app_date] => 1980-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10336 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/307/04307463.pdf [firstpage_image] =>[orig_patent_app_number] => 119655 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/119655
Vital rate decoder Feb 7, 1980 Issued
Array ( [id] => 1951843 [patent_doc_number] => 04321704 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-23 [patent_title] => 'Parity checking circuitry for use in multi-bit cell PCM recording and reproducing apparatus' [patent_app_type] => 1 [patent_app_number] => 6/117745 [patent_app_country] => US [patent_app_date] => 1980-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 45 [patent_no_of_words] => 42220 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/321/04321704.pdf [firstpage_image] =>[orig_patent_app_number] => 117745 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/117745
Parity checking circuitry for use in multi-bit cell PCM recording and reproducing apparatus Jan 31, 1980 Issued
Array ( [id] => 1965640 [patent_doc_number] => 04315331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-02-09 [patent_title] => 'Apparatus for providing drop-out compensation in recording and reproducing systems' [patent_app_type] => 1 [patent_app_number] => 6/117422 [patent_app_country] => US [patent_app_date] => 1980-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 42 [patent_no_of_words] => 42056 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/315/04315331.pdf [firstpage_image] =>[orig_patent_app_number] => 117422 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/117422
Apparatus for providing drop-out compensation in recording and reproducing systems Jan 31, 1980 Issued
Array ( [id] => 1968694 [patent_doc_number] => 04320510 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-16 [patent_title] => 'Error data correcting system' [patent_app_type] => 1 [patent_app_number] => 6/116555 [patent_app_country] => US [patent_app_date] => 1980-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 10350 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/320/04320510.pdf [firstpage_image] =>[orig_patent_app_number] => 116555 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/116555
Error data correcting system Jan 28, 1980 Issued
Array ( [id] => 1934868 [patent_doc_number] => 04347608 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-31 [patent_title] => 'Self-checking system for electronic processing equipment' [patent_app_type] => 1 [patent_app_number] => 6/114294 [patent_app_country] => US [patent_app_date] => 1980-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1999 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/347/04347608.pdf [firstpage_image] =>[orig_patent_app_number] => 114294 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/114294
Self-checking system for electronic processing equipment Jan 21, 1980 Issued
Array ( [id] => 1945461 [patent_doc_number] => 04309768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-05 [patent_title] => 'Mismatch detection circuit for duplicated logic units' [patent_app_type] => 1 [patent_app_number] => 6/108660 [patent_app_country] => US [patent_app_date] => 1979-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3289 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/309/04309768.pdf [firstpage_image] =>[orig_patent_app_number] => 108660 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/108660
Mismatch detection circuit for duplicated logic units Dec 30, 1979 Issued
Array ( [id] => 1946153 [patent_doc_number] => 04314349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-02-02 [patent_title] => 'Processing element for parallel array processors' [patent_app_type] => 1 [patent_app_number] => 6/108883 [patent_app_country] => US [patent_app_date] => 1979-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5978 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/314/04314349.pdf [firstpage_image] =>[orig_patent_app_number] => 108883 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/108883
Processing element for parallel array processors Dec 30, 1979 Issued
Array ( [id] => 1988104 [patent_doc_number] => 04360916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-11-23 [patent_title] => 'Method and apparatus for providing for two bits-error detection and correction' [patent_app_type] => 1 [patent_app_number] => 6/108876 [patent_app_country] => US [patent_app_date] => 1979-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 9274 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/360/04360916.pdf [firstpage_image] =>[orig_patent_app_number] => 108876 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/108876
Method and apparatus for providing for two bits-error detection and correction Dec 30, 1979 Issued
Array ( [id] => 1971927 [patent_doc_number] => 04319355 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-09 [patent_title] => 'Method of and apparatus for testing a memory matrix control character' [patent_app_type] => 1 [patent_app_number] => 6/108335 [patent_app_country] => US [patent_app_date] => 1979-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5602 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/319/04319355.pdf [firstpage_image] =>[orig_patent_app_number] => 108335 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/108335
Method of and apparatus for testing a memory matrix control character Dec 27, 1979 Issued
Array ( [id] => 1960680 [patent_doc_number] => 04334307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-06-08 [patent_title] => 'Data processing system with self testing and configuration mapping capability' [patent_app_type] => 1 [patent_app_number] => 6/108047 [patent_app_country] => US [patent_app_date] => 1979-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 39 [patent_no_of_words] => 7863 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/334/04334307.pdf [firstpage_image] =>[orig_patent_app_number] => 108047 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/108047
Data processing system with self testing and configuration mapping capability Dec 27, 1979 Issued
Array ( [id] => 1969699 [patent_doc_number] => 04363125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-12-07 [patent_title] => 'Memory readback check method and apparatus' [patent_app_type] => 1 [patent_app_number] => 6/106633 [patent_app_country] => US [patent_app_date] => 1979-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7718 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/363/04363125.pdf [firstpage_image] =>[orig_patent_app_number] => 106633 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/106633
Memory readback check method and apparatus Dec 25, 1979 Issued
Array ( [id] => 1971936 [patent_doc_number] => 04319357 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-09 [patent_title] => 'Double error correction using single error correcting code' [patent_app_type] => 1 [patent_app_number] => 6/103633 [patent_app_country] => US [patent_app_date] => 1979-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2709 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/319/04319357.pdf [firstpage_image] =>[orig_patent_app_number] => 103633 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/103633
Double error correction using single error correcting code Dec 13, 1979 Issued
Array ( [id] => 1929171 [patent_doc_number] => 04287594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-01 [patent_title] => 'Function test evaluation apparatus for evaluating a function test of a logical circuit' [patent_app_type] => 1 [patent_app_number] => 6/102835 [patent_app_country] => US [patent_app_date] => 1979-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5800 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/287/04287594.pdf [firstpage_image] =>[orig_patent_app_number] => 102835 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/102835
Function test evaluation apparatus for evaluating a function test of a logical circuit Dec 11, 1979 Issued
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