Search

Sara Elizabeth Townsley

Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )

Most Active Art Unit
1629
Art Unit(s)
1629, 1612, 1613
Total Applications
514
Issued Applications
97
Pending Applications
81
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1975052 [patent_doc_number] => 04312070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-19 [patent_title] => 'Digital encoder-decoder' [patent_app_type] => 1 [patent_app_number] => 6/101345 [patent_app_country] => US [patent_app_date] => 1979-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 5658 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/312/04312070.pdf [firstpage_image] =>[orig_patent_app_number] => 101345 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/101345
Digital encoder-decoder Dec 6, 1979 Issued
Array ( [id] => 1948186 [patent_doc_number] => 04336611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-06-22 [patent_title] => 'Error correction apparatus and method' [patent_app_type] => 1 [patent_app_number] => 6/099351 [patent_app_country] => US [patent_app_date] => 1979-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 8163 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/336/04336611.pdf [firstpage_image] =>[orig_patent_app_number] => 099351 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/099351
Error correction apparatus and method Dec 2, 1979 Issued
Array ( [id] => 1958711 [patent_doc_number] => 04333177 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-06-01 [patent_title] => 'Test control circuit for multichannel apparatus such as tape recorders and the like' [patent_app_type] => 1 [patent_app_number] => 6/090050 [patent_app_country] => US [patent_app_date] => 1979-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4880 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/333/04333177.pdf [firstpage_image] =>[orig_patent_app_number] => 090050 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/090050
Test control circuit for multichannel apparatus such as tape recorders and the like Oct 30, 1979 Issued
Array ( [id] => 1907133 [patent_doc_number] => 04302821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-24 [patent_title] => 'Interposer control for electronic postage meter' [patent_app_type] => 1 [patent_app_number] => 6/089411 [patent_app_country] => US [patent_app_date] => 1979-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/302/04302821.pdf [firstpage_image] =>[orig_patent_app_number] => 089411 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/089411
Interposer control for electronic postage meter Oct 29, 1979 Issued
Array ( [id] => 1886516 [patent_doc_number] => 04296494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-20 [patent_title] => 'Error correction and detection systems' [patent_app_type] => 1 [patent_app_number] => 6/084452 [patent_app_country] => US [patent_app_date] => 1979-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7702 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/296/04296494.pdf [firstpage_image] =>[orig_patent_app_number] => 084452 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/084452
Error correction and detection systems Oct 11, 1979 Issued
Array ( [id] => 1914718 [patent_doc_number] => 04300234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-10 [patent_title] => 'Address pattern generator for testing a memory' [patent_app_type] => 1 [patent_app_number] => 6/083527 [patent_app_country] => US [patent_app_date] => 1979-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5129 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/300/04300234.pdf [firstpage_image] =>[orig_patent_app_number] => 083527 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/083527
Address pattern generator for testing a memory Oct 9, 1979 Issued
Array ( [id] => 1894055 [patent_doc_number] => 04261035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-04-07 [patent_title] => 'Broadband high level data link communication line adapter' [patent_app_type] => 1 [patent_app_number] => 6/079961 [patent_app_country] => US [patent_app_date] => 1979-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 42 [patent_no_of_words] => 27252 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/261/04261035.pdf [firstpage_image] =>[orig_patent_app_number] => 079961 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/079961
Broadband high level data link communication line adapter Sep 27, 1979 Issued
Array ( [id] => 1914570 [patent_doc_number] => 04300207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-10 [patent_title] => 'Multiple matrix switching system' [patent_app_type] => 1 [patent_app_number] => 6/078900 [patent_app_country] => US [patent_app_date] => 1979-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5350 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/300/04300207.pdf [firstpage_image] =>[orig_patent_app_number] => 078900 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/078900
Multiple matrix switching system Sep 24, 1979 Issued
Array ( [id] => 1956817 [patent_doc_number] => 04317203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-02-23 [patent_title] => 'Collator error recovery' [patent_app_type] => 1 [patent_app_number] => 6/077064 [patent_app_country] => US [patent_app_date] => 1979-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8767 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/317/04317203.pdf [firstpage_image] =>[orig_patent_app_number] => 077064 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/077064
Collator error recovery Sep 18, 1979 Issued
Array ( [id] => 1917127 [patent_doc_number] => 04308615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-12-29 [patent_title] => 'Microprocessor based maintenance system' [patent_app_type] => 1 [patent_app_number] => 6/075773 [patent_app_country] => US [patent_app_date] => 1979-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 11346 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/308/04308615.pdf [firstpage_image] =>[orig_patent_app_number] => 075773 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/075773
Microprocessor based maintenance system Sep 16, 1979 Issued
Array ( [id] => 1920802 [patent_doc_number] => 04291405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-22 [patent_title] => 'Error reduction speech communication system' [patent_app_type] => 1 [patent_app_number] => 6/073207 [patent_app_country] => US [patent_app_date] => 1979-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8891 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/291/04291405.pdf [firstpage_image] =>[orig_patent_app_number] => 073207 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/073207
Error reduction speech communication system Sep 6, 1979 Issued
Array ( [id] => 1878534 [patent_doc_number] => 04280218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-07-21 [patent_title] => 'False alarm processor' [patent_app_type] => 1 [patent_app_number] => 6/064845 [patent_app_country] => US [patent_app_date] => 1979-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 6022 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/280/04280218.pdf [firstpage_image] =>[orig_patent_app_number] => 064845 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/064845
False alarm processor Aug 7, 1979 Issued
Array ( [id] => 1920807 [patent_doc_number] => 04291406 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-22 [patent_title] => 'Error correction on burst channels by sequential decoding' [patent_app_type] => 1 [patent_app_number] => 6/064223 [patent_app_country] => US [patent_app_date] => 1979-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 47 [patent_no_of_words] => 22581 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/291/04291406.pdf [firstpage_image] =>[orig_patent_app_number] => 064223 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/064223
Error correction on burst channels by sequential decoding Aug 5, 1979 Issued
Array ( [id] => 1903854 [patent_doc_number] => 04276647 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-06-30 [patent_title] => 'High speed Hamming code circuit and method for the correction of error bursts' [patent_app_type] => 1 [patent_app_number] => 6/063022 [patent_app_country] => US [patent_app_date] => 1979-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4076 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/276/04276647.pdf [firstpage_image] =>[orig_patent_app_number] => 063022 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/063022
High speed Hamming code circuit and method for the correction of error bursts Aug 1, 1979 Issued
Array ( [id] => 1873156 [patent_doc_number] => 04292674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-29 [patent_title] => 'One word buffer memory system' [patent_app_type] => 1 [patent_app_number] => 6/061226 [patent_app_country] => US [patent_app_date] => 1979-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4744 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/292/04292674.pdf [firstpage_image] =>[orig_patent_app_number] => 061226 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/061226
One word buffer memory system Jul 26, 1979 Issued
Array ( [id] => 1926791 [patent_doc_number] => 04298980 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-03 [patent_title] => 'LSI Circuitry conforming to level sensitive scan design (LSSD) rules and method of testing same' [patent_app_type] => 1 [patent_app_number] => 6/060932 [patent_app_country] => US [patent_app_date] => 1979-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7666 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/298/04298980.pdf [firstpage_image] =>[orig_patent_app_number] => 060932 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/060932
LSI Circuitry conforming to level sensitive scan design (LSSD) rules and method of testing same Jul 25, 1979 Issued
Array ( [id] => 1982240 [patent_doc_number] => 04328580 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-05-04 [patent_title] => 'Apparatus and an improved method for processing of digital information' [patent_app_type] => 1 [patent_app_number] => 6/055689 [patent_app_country] => US [patent_app_date] => 1979-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 6791 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/328/04328580.pdf [firstpage_image] =>[orig_patent_app_number] => 055689 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/055689
Apparatus and an improved method for processing of digital information Jul 5, 1979 Issued
Array ( [id] => 1900625 [patent_doc_number] => 04301535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-17 [patent_title] => 'Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit' [patent_app_type] => 1 [patent_app_number] => 6/053880 [patent_app_country] => US [patent_app_date] => 1979-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6854 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/301/04301535.pdf [firstpage_image] =>[orig_patent_app_number] => 053880 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/053880
Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit Jul 1, 1979 Issued
Array ( [id] => 1872458 [patent_doc_number] => 04283786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-08-11 [patent_title] => 'Digital transmission system' [patent_app_type] => 1 [patent_app_number] => 6/052115 [patent_app_country] => US [patent_app_date] => 1979-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 37 [patent_no_of_words] => 3826 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/283/04283786.pdf [firstpage_image] =>[orig_patent_app_number] => 052115 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/052115
Digital transmission system Jun 25, 1979 Issued
Array ( [id] => 1866236 [patent_doc_number] => 04295218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-13 [patent_title] => 'Error-correcting coding system' [patent_app_type] => 1 [patent_app_number] => 6/051416 [patent_app_country] => US [patent_app_date] => 1979-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 39 [patent_no_of_words] => 18748 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/295/04295218.pdf [firstpage_image] =>[orig_patent_app_number] => 051416 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/051416
Error-correcting coding system Jun 24, 1979 Issued
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