
Sara Elizabeth Townsley
Examiner (ID: 2446, Phone: (571)270-7672 , Office: P/1629 )
| Most Active Art Unit | 1629 |
| Art Unit(s) | 1629, 1612, 1613 |
| Total Applications | 514 |
| Issued Applications | 97 |
| Pending Applications | 81 |
| Abandoned Applications | 352 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2844987
[patent_doc_number] => RE034088
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-06
[patent_title] => 'On-the-fly error correction'
[patent_app_type] => 2
[patent_app_number] => 7/690524
[patent_app_country] => US
[patent_app_date] => 1991-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4131
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/034/RE034088.pdf
[firstpage_image] =>[orig_patent_app_number] => 690524
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/690524 | On-the-fly error correction | Apr 22, 1991 | Issued |
Array
(
[id] => 2974289
[patent_doc_number] => 05274646
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-28
[patent_title] => 'Excessive error correction control'
[patent_app_type] => 1
[patent_app_number] => 7/686721
[patent_app_country] => US
[patent_app_date] => 1991-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 8691
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/274/05274646.pdf
[firstpage_image] =>[orig_patent_app_number] => 686721
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/686721 | Excessive error correction control | Apr 16, 1991 | Issued |
Array
(
[id] => 3100411
[patent_doc_number] => 05278839
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-11
[patent_title] => 'Semiconductor integrated circuit having self-check and self-repair capabilities'
[patent_app_type] => 1
[patent_app_number] => 7/693911
[patent_app_country] => US
[patent_app_date] => 1991-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 6340
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 506
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/278/05278839.pdf
[firstpage_image] =>[orig_patent_app_number] => 693911
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/693911 | Semiconductor integrated circuit having self-check and self-repair capabilities | Apr 15, 1991 | Issued |
Array
(
[id] => 2906016
[patent_doc_number] => 05241550
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'System for accurately confirming cross-connection in a cross-connection network'
[patent_app_type] => 1
[patent_app_number] => 7/683435
[patent_app_country] => US
[patent_app_date] => 1991-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4437
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 730
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/241/05241550.pdf
[firstpage_image] =>[orig_patent_app_number] => 683435
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/683435 | System for accurately confirming cross-connection in a cross-connection network | Apr 10, 1991 | Issued |
Array
(
[id] => 3107994
[patent_doc_number] => 05291589
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-01
[patent_title] => 'System for controlling restoration from failure in queue structure of control data'
[patent_app_type] => 1
[patent_app_number] => 7/683041
[patent_app_country] => US
[patent_app_date] => 1991-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2156
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/291/05291589.pdf
[firstpage_image] =>[orig_patent_app_number] => 683041
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/683041 | System for controlling restoration from failure in queue structure of control data | Apr 9, 1991 | Issued |
Array
(
[id] => 3024660
[patent_doc_number] => 05276862
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-04
[patent_title] => 'Safestore frame implementation in a central processor'
[patent_app_type] => 1
[patent_app_number] => 7/682801
[patent_app_country] => US
[patent_app_date] => 1991-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2963
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 289
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/276/05276862.pdf
[firstpage_image] =>[orig_patent_app_number] => 682801
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/682801 | Safestore frame implementation in a central processor | Apr 8, 1991 | Issued |
Array
(
[id] => 3112380
[patent_doc_number] => 05315598
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-24
[patent_title] => 'Method to reduce burn-in time and inducing infant failure'
[patent_app_type] => 1
[patent_app_number] => 7/680662
[patent_app_country] => US
[patent_app_date] => 1991-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/315/05315598.pdf
[firstpage_image] =>[orig_patent_app_number] => 680662
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/680662 | Method to reduce burn-in time and inducing infant failure | Apr 3, 1991 | Issued |
Array
(
[id] => 2915765
[patent_doc_number] => 05249288
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-28
[patent_title] => 'Process for accommodating bad disk pages in an electronic printing system'
[patent_app_type] => 1
[patent_app_number] => 7/678091
[patent_app_country] => US
[patent_app_date] => 1991-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 3977
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/249/05249288.pdf
[firstpage_image] =>[orig_patent_app_number] => 678091
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/678091 | Process for accommodating bad disk pages in an electronic printing system | Mar 31, 1991 | Issued |
Array
(
[id] => 3100600
[patent_doc_number] => 05278849
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-11
[patent_title] => 'Method and apparatus for identifying valid data cells in a redundant pair combining unit of an asynchronous transfer mode switch'
[patent_app_type] => 1
[patent_app_number] => 7/676172
[patent_app_country] => US
[patent_app_date] => 1991-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1620
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/278/05278849.pdf
[firstpage_image] =>[orig_patent_app_number] => 676172
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/676172 | Method and apparatus for identifying valid data cells in a redundant pair combining unit of an asynchronous transfer mode switch | Mar 27, 1991 | Issued |
Array
(
[id] => 2966745
[patent_doc_number] => 05243603
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-07
[patent_title] => 'Method for online modification of compressed digital test vectors'
[patent_app_type] => 1
[patent_app_number] => 7/675591
[patent_app_country] => US
[patent_app_date] => 1991-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5818
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/243/05243603.pdf
[firstpage_image] =>[orig_patent_app_number] => 675591
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/675591 | Method for online modification of compressed digital test vectors | Mar 25, 1991 | Issued |
Array
(
[id] => 2932565
[patent_doc_number] => 05235600
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-10
[patent_title] => 'Scannable system with addressable clock suppress elements'
[patent_app_type] => 1
[patent_app_number] => 7/672951
[patent_app_country] => US
[patent_app_date] => 1991-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 16665
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/235/05235600.pdf
[firstpage_image] =>[orig_patent_app_number] => 672951
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/672951 | Scannable system with addressable clock suppress elements | Mar 20, 1991 | Issued |
Array
(
[id] => 3097187
[patent_doc_number] => 05285458
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-08
[patent_title] => 'System for suppressing spread of error generated in differential coding'
[patent_app_type] => 1
[patent_app_number] => 7/672681
[patent_app_country] => US
[patent_app_date] => 1991-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 3099
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 297
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/285/05285458.pdf
[firstpage_image] =>[orig_patent_app_number] => 672681
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/672681 | System for suppressing spread of error generated in differential coding | Mar 19, 1991 | Issued |
Array
(
[id] => 3103022
[patent_doc_number] => 05278977
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-11
[patent_title] => 'Intelligent node resident failure test and response in a multi-node system'
[patent_app_type] => 1
[patent_app_number] => 7/671323
[patent_app_country] => US
[patent_app_date] => 1991-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6791
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 429
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/278/05278977.pdf
[firstpage_image] =>[orig_patent_app_number] => 671323
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/671323 | Intelligent node resident failure test and response in a multi-node system | Mar 18, 1991 | Issued |
| 07/668531 | BIDIRECTIONAL BOUNDARY-SCAN CIRCUIT | Mar 12, 1991 | Abandoned |
Array
(
[id] => 3042019
[patent_doc_number] => 05317725
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-31
[patent_title] => 'Landmark data abstraction paradigm to diagnose data communication networks'
[patent_app_type] => 1
[patent_app_number] => 7/668282
[patent_app_country] => US
[patent_app_date] => 1991-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 38
[patent_no_of_words] => 18098
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/317/05317725.pdf
[firstpage_image] =>[orig_patent_app_number] => 668282
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/668282 | Landmark data abstraction paradigm to diagnose data communication networks | Mar 11, 1991 | Issued |
Array
(
[id] => 2801398
[patent_doc_number] => 05103450
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-07
[patent_title] => 'Event qualified testing protocols for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/668715
[patent_app_country] => US
[patent_app_date] => 1991-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 28
[patent_no_of_words] => 16117
[patent_no_of_claims] => 71
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/103/05103450.pdf
[firstpage_image] =>[orig_patent_app_number] => 668715
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/668715 | Event qualified testing protocols for integrated circuits | Mar 11, 1991 | Issued |
Array
(
[id] => 2929418
[patent_doc_number] => 05206863
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-27
[patent_title] => 'Processor-to-processor communications protocol for a public service trunking system'
[patent_app_type] => 1
[patent_app_number] => 7/666862
[patent_app_country] => US
[patent_app_date] => 1991-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 20
[patent_no_of_words] => 32652
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/206/05206863.pdf
[firstpage_image] =>[orig_patent_app_number] => 666862
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/666862 | Processor-to-processor communications protocol for a public service trunking system | Mar 7, 1991 | Issued |
Array
(
[id] => 3095117
[patent_doc_number] => 05280606
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-18
[patent_title] => 'Fault recovery processing for supercomputer'
[patent_app_type] => 1
[patent_app_number] => 7/665955
[patent_app_country] => US
[patent_app_date] => 1991-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6352
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/280/05280606.pdf
[firstpage_image] =>[orig_patent_app_number] => 665955
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/665955 | Fault recovery processing for supercomputer | Mar 7, 1991 | Issued |
Array
(
[id] => 2929400
[patent_doc_number] => 05206862
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-27
[patent_title] => 'Method and apparatus for locally deriving test signals from previous response signals'
[patent_app_type] => 1
[patent_app_number] => 7/667611
[patent_app_country] => US
[patent_app_date] => 1991-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2579
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/206/05206862.pdf
[firstpage_image] =>[orig_patent_app_number] => 667611
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/667611 | Method and apparatus for locally deriving test signals from previous response signals | Mar 7, 1991 | Issued |
| 07/664732 | ERROR CORRECTION SYSTEM CAPABLE OF CORRECTING AN ERROR IN A PACKET HEADER BY THE USE OF A REED-SOLOMON CODE | Mar 4, 1991 | Abandoned |