Search

Sara W. Crane

Examiner (ID: 9101)

Most Active Art Unit
2811
Art Unit(s)
2503, 2508, 2899, 2811
Total Applications
1624
Issued Applications
1262
Pending Applications
54
Abandoned Applications
308

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4336596 [patent_doc_number] => 06313494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Semiconductor device having a selectively-grown contact pad' [patent_app_type] => 1 [patent_app_number] => 9/203385 [patent_app_country] => US [patent_app_date] => 1998-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 2773 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313494.pdf [firstpage_image] =>[orig_patent_app_number] => 203385 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/203385
Semiconductor device having a selectively-grown contact pad Dec 1, 1998 Issued
Array ( [id] => 4389510 [patent_doc_number] => 06262435 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Etch bias distribution across semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/203616 [patent_app_country] => US [patent_app_date] => 1998-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4247 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/262/06262435.pdf [firstpage_image] =>[orig_patent_app_number] => 203616 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/203616
Etch bias distribution across semiconductor wafer Nov 30, 1998 Issued
Array ( [id] => 4309656 [patent_doc_number] => 06188114 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Method of forming an insulated-gate field-effect transistor with metal spacers' [patent_app_type] => 1 [patent_app_number] => 9/204016 [patent_app_country] => US [patent_app_date] => 1998-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 5239 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/188/06188114.pdf [firstpage_image] =>[orig_patent_app_number] => 204016 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204016
Method of forming an insulated-gate field-effect transistor with metal spacers Nov 30, 1998 Issued
Array ( [id] => 6137810 [patent_doc_number] => 20020000603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR PRODUCING THE SAME' [patent_app_type] => new [patent_app_number] => 09/199264 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 10778 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20020000603.pdf [firstpage_image] =>[orig_patent_app_number] => 09199264 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199264
Non-volatile semiconductor memory device and method for producing the same Nov 24, 1998 Issued
Array ( [id] => 4414056 [patent_doc_number] => 06229166 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Ferroelectric random access memory device and fabrication method therefor' [patent_app_type] => 1 [patent_app_number] => 9/198374 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4230 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229166.pdf [firstpage_image] =>[orig_patent_app_number] => 198374 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/198374
Ferroelectric random access memory device and fabrication method therefor Nov 23, 1998 Issued
Array ( [id] => 1561724 [patent_doc_number] => 06437396 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Nonvolatile memory' [patent_app_type] => B1 [patent_app_number] => 09/197064 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 1930 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437396.pdf [firstpage_image] =>[orig_patent_app_number] => 09197064 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197064
Nonvolatile memory Nov 19, 1998 Issued
Array ( [id] => 4368680 [patent_doc_number] => 06287915 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => 1 [patent_app_number] => 9/196417 [patent_app_country] => US [patent_app_date] => 1998-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5017 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/287/06287915.pdf [firstpage_image] =>[orig_patent_app_number] => 196417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196417
Semiconductor device and manufacturing method therefor Nov 18, 1998 Issued
Array ( [id] => 6646898 [patent_doc_number] => 20030075755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'NONVOLATILE MEMORY AND ELECTRONIC APPARATUS' [patent_app_type] => new [patent_app_number] => 09/192745 [patent_app_country] => US [patent_app_date] => 1998-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13625 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20030075755.pdf [firstpage_image] =>[orig_patent_app_number] => 09192745 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192745
Nonvolatile memory and electronic apparatus Nov 15, 1998 Issued
Array ( [id] => 4318012 [patent_doc_number] => 06316819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Multilayer ZnO polycrystalline diode' [patent_app_type] => 1 [patent_app_number] => 9/101520 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3589 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316819.pdf [firstpage_image] =>[orig_patent_app_number] => 101520 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/101520
Multilayer ZnO polycrystalline diode Nov 12, 1998 Issued
Array ( [id] => 4412844 [patent_doc_number] => 06239467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method of forming semiconductor devices using gate electrode length and spacer width for controlling drive current strength' [patent_app_type] => 1 [patent_app_number] => 9/183616 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3081 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239467.pdf [firstpage_image] =>[orig_patent_app_number] => 183616 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183616
Method of forming semiconductor devices using gate electrode length and spacer width for controlling drive current strength Oct 29, 1998 Issued
Array ( [id] => 4422625 [patent_doc_number] => 06194768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'High dielectric constant gate dielectric with an overlying tantalum gate conductor formed on a sidewall surface of a sacrificial structure' [patent_app_type] => 1 [patent_app_number] => 9/177867 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4513 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194768.pdf [firstpage_image] =>[orig_patent_app_number] => 177867 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177867
High dielectric constant gate dielectric with an overlying tantalum gate conductor formed on a sidewall surface of a sacrificial structure Oct 22, 1998 Issued
Array ( [id] => 634509 [patent_doc_number] => 07129543 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-31 [patent_title] => 'Method of designing semiconductor device, semiconductor device and recording medium' [patent_app_type] => utility [patent_app_number] => 09/176315 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 13463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/129/07129543.pdf [firstpage_image] =>[orig_patent_app_number] => 09176315 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176315
Method of designing semiconductor device, semiconductor device and recording medium Oct 21, 1998 Issued
Array ( [id] => 4276865 [patent_doc_number] => 06246082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Semiconductor memory device with less characteristic deterioration of dielectric thin film' [patent_app_type] => 1 [patent_app_number] => 9/176508 [patent_app_country] => US [patent_app_date] => 1998-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 8398 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246082.pdf [firstpage_image] =>[orig_patent_app_number] => 176508 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176508
Semiconductor memory device with less characteristic deterioration of dielectric thin film Oct 20, 1998 Issued
Array ( [id] => 4140377 [patent_doc_number] => 06015978 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Resonance tunnel device' [patent_app_type] => 1 [patent_app_number] => 9/175505 [patent_app_country] => US [patent_app_date] => 1998-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 42 [patent_no_of_words] => 5006 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015978.pdf [firstpage_image] =>[orig_patent_app_number] => 175505 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/175505
Resonance tunnel device Oct 19, 1998 Issued
Array ( [id] => 3885832 [patent_doc_number] => RE036440 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Integrated circuit SRAM cell layouts' [patent_app_type] => 2 [patent_app_number] => 9/176158 [patent_app_country] => US [patent_app_date] => 1998-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 32 [patent_no_of_words] => 6296 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036440.pdf [firstpage_image] =>[orig_patent_app_number] => 176158 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176158
Integrated circuit SRAM cell layouts Oct 19, 1998 Issued
Array ( [id] => 4362713 [patent_doc_number] => 06175144 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Advanced isolation structure for high density semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/163795 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2477 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175144.pdf [firstpage_image] =>[orig_patent_app_number] => 163795 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163795
Advanced isolation structure for high density semiconductor devices Sep 29, 1998 Issued
Array ( [id] => 1603206 [patent_doc_number] => 06433386 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Sense FET having a selectable sense current ratio and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/161116 [patent_app_country] => US [patent_app_date] => 1998-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4288 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/433/06433386.pdf [firstpage_image] =>[orig_patent_app_number] => 09161116 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/161116
Sense FET having a selectable sense current ratio and method of manufacturing the same Sep 24, 1998 Issued
Array ( [id] => 4389732 [patent_doc_number] => 06262452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Nonvolatile semiconductor memory device and manufacturing method therefor' [patent_app_type] => 1 [patent_app_number] => 9/160134 [patent_app_country] => US [patent_app_date] => 1998-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 69 [patent_no_of_words] => 7097 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/262/06262452.pdf [firstpage_image] =>[orig_patent_app_number] => 160134 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/160134
Nonvolatile semiconductor memory device and manufacturing method therefor Sep 24, 1998 Issued
Array ( [id] => 4337290 [patent_doc_number] => 06313542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Method and apparatus for detecting edges under an opaque layer' [patent_app_type] => 1 [patent_app_number] => 9/160319 [patent_app_country] => US [patent_app_date] => 1998-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4531 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313542.pdf [firstpage_image] =>[orig_patent_app_number] => 160319 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/160319
Method and apparatus for detecting edges under an opaque layer Sep 24, 1998 Issued
Array ( [id] => 1580341 [patent_doc_number] => 06448631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-09-10 [patent_title] => 'Cell architecture with local interconnect and method for making same' [patent_app_type] => B2 [patent_app_number] => 09/159264 [patent_app_country] => US [patent_app_date] => 1998-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 63 [patent_no_of_words] => 6870 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448631.pdf [firstpage_image] =>[orig_patent_app_number] => 09159264 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/159264
Cell architecture with local interconnect and method for making same Sep 22, 1998 Issued
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