Sara W. Crane

Array ( [id] => 4212277 [patent_doc_number] => 06028334 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/758258 [patent_app_country] => US [patent_app_date] => 1996-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 3612 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028334.pdf [firstpage_image] =>[orig_patent_app_number] => 758258 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1363910 [patent_doc_number] => 06573527 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Quantum semiconductor device including quantum dots and a fabrication process thereof' [patent_app_type] => B1 [patent_app_number] => 08/753598 [patent_app_country] => US [patent_app_date] => 1996-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 9713 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573527.pdf [firstpage_image] =>[orig_patent_app_number] => 08753598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1547431 [patent_doc_number] => 06445034 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'MOS transistor having first and second channel segments with different widths and lengths' [patent_app_type] => B1 [patent_app_number] => 08/753556 [patent_app_country] => US [patent_app_date] => 1996-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1502 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445034.pdf [firstpage_image] =>[orig_patent_app_number] => 08753556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3780567 [patent_doc_number] => 05808363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/748838 [patent_app_country] => US [patent_app_date] => 1996-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808363.pdf [firstpage_image] =>[orig_patent_app_number] => 748838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3885509 [patent_doc_number] => 05798547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Non-volatile semiconductor memory device having NAND structure cells' [patent_app_type] => 1 [patent_app_number] => 8/748278 [patent_app_country] => US [patent_app_date] => 1996-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5406 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 409 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798547.pdf [firstpage_image] =>[orig_patent_app_number] => 748278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4148220 [patent_doc_number] => 06031288 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer and method of fabrication thereof' [patent_app_type] => 1 [patent_app_number] => 8/747392 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 64 [patent_no_of_words] => 14715 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031288.pdf [firstpage_image] =>[orig_patent_app_number] => 747392 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4137373 [patent_doc_number] => 06034428 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Semiconductor integrated circuit device having stacked wiring and insulating layers' [patent_app_type] => 1 [patent_app_number] => 8/745203 [patent_app_country] => US [patent_app_date] => 1996-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 55 [patent_no_of_words] => 8328 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034428.pdf [firstpage_image] =>[orig_patent_app_number] => 745203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3874336 [patent_doc_number] => 05838036 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Semiconductor memory device capable of realizing a minimum memory cell area approximate to a theoretical value' [patent_app_type] => 1 [patent_app_number] => 8/746440 [patent_app_country] => US [patent_app_date] => 1996-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 4171 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838036.pdf [firstpage_image] =>[orig_patent_app_number] => 746440 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3799057 [patent_doc_number] => 05780874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Process for forming fluorinated resin or amorphous carbon layer and devices containing same' [patent_app_type] => 1 [patent_app_number] => 8/744072 [patent_app_country] => US [patent_app_date] => 1996-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 3867 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/780/05780874.pdf [firstpage_image] =>[orig_patent_app_number] => 744072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3766356 [patent_doc_number] => 05844268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/742492 [patent_app_country] => US [patent_app_date] => 1996-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 33 [patent_no_of_words] => 10369 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/844/05844268.pdf [firstpage_image] =>[orig_patent_app_number] => 742492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3836955 [patent_doc_number] => 05814865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Bimodal ESD protection for DRAM power supplies and SCRs for DRAMs and logic circuits' [patent_app_type] => 1 [patent_app_number] => 8/742196 [patent_app_country] => US [patent_app_date] => 1996-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 3567 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/814/05814865.pdf [firstpage_image] =>[orig_patent_app_number] => 742196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4189375 [patent_doc_number] => 06150695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Multilevel transistor formation employing a local substrate formed within a shallow trench' [patent_app_type] => 1 [patent_app_number] => 8/741812 [patent_app_country] => US [patent_app_date] => 1996-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 6055 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150695.pdf [firstpage_image] =>[orig_patent_app_number] => 741812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3879778 [patent_doc_number] => 05825046 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Composite memory material comprising a mixture of phase-change memory material and dielectric material' [patent_app_type] => 1 [patent_app_number] => 8/739080 [patent_app_country] => US [patent_app_date] => 1996-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 8602 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825046.pdf [firstpage_image] =>[orig_patent_app_number] => 739080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4049034 [patent_doc_number] => 05909045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Semiconductor memory device having tree-type capacitor' [patent_app_type] => 1 [patent_app_number] => 8/736924 [patent_app_country] => US [patent_app_date] => 1996-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 7659 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909045.pdf [firstpage_image] =>[orig_patent_app_number] => 736924 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4049148 [patent_doc_number] => 05912485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-15 [patent_title] => 'Capacitor structure for a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/736598 [patent_app_country] => US [patent_app_date] => 1996-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 43 [patent_no_of_words] => 9135 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/912/05912485.pdf [firstpage_image] =>[orig_patent_app_number] => 736598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3801491 [patent_doc_number] => 05828076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Microelectronic component and process for its production' [patent_app_type] => 1 [patent_app_number] => 8/727440 [patent_app_country] => US [patent_app_date] => 1996-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3519 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828076.pdf [firstpage_image] =>[orig_patent_app_number] => 727440 [rel_patent_id] =>[rel_patent_doc_number] =>)