Sara W. Crane

Array ( [id] => 3926692 [patent_doc_number] => 05914504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'DRAM applications using vertical MISFET devices' [patent_app_type] => 1 [patent_app_number] => 8/664874 [patent_app_country] => US [patent_app_date] => 1996-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 15450 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914504.pdf [firstpage_image] =>[orig_patent_app_number] => 664874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3909189 [patent_doc_number] => 05898210 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Semiconductor diode with high turn on and breakdown voltages' [patent_app_type] => 1 [patent_app_number] => 8/665160 [patent_app_country] => US [patent_app_date] => 1996-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2221 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898210.pdf [firstpage_image] =>[orig_patent_app_number] => 665160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3874518 [patent_doc_number] => 05838046 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Operating method for ROM array which minimizes band-to-band tunneling' [patent_app_type] => 1 [patent_app_number] => 8/665136 [patent_app_country] => US [patent_app_date] => 1996-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3243 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838046.pdf [firstpage_image] =>[orig_patent_app_number] => 665136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5981928 [patent_doc_number] => 20020096703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'VERTICALLY INTEGRATED FLASH EEPROM FOR GREATER DENSITY AND LOWER COST' [patent_app_type] => new [patent_app_number] => 08/654760 [patent_app_country] => US [patent_app_date] => 1996-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7043 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20020096703.pdf [firstpage_image] =>[orig_patent_app_number] => 08654760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3961232 [patent_doc_number] => 05936294 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Optical semiconductor component and method of fabrication' [patent_app_type] => 1 [patent_app_number] => 8/654514 [patent_app_country] => US [patent_app_date] => 1996-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 1 [patent_no_of_words] => 4196 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936294.pdf [firstpage_image] =>[orig_patent_app_number] => 654514 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3882542 [patent_doc_number] => 05804849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Compound semiconductor device and method of manufacture' [patent_app_type] => 1 [patent_app_number] => 8/645378 [patent_app_country] => US [patent_app_date] => 1996-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/804/05804849.pdf [firstpage_image] =>[orig_patent_app_number] => 645378 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3899122 [patent_doc_number] => 05777824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Side-disposed thin film magnetic head and method of fabrication thereof' [patent_app_type] => 1 [patent_app_number] => 8/645182 [patent_app_country] => US [patent_app_date] => 1996-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 8024 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/777/05777824.pdf [firstpage_image] =>[orig_patent_app_number] => 645182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3812016 [patent_doc_number] => 05831286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'High mobility p-type transition metal tri-antimonide and related skutterudite compounds and alloys for power semiconducting devices' [patent_app_type] => 1 [patent_app_number] => 8/643914 [patent_app_country] => US [patent_app_date] => 1996-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 8017 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831286.pdf [firstpage_image] =>[orig_patent_app_number] => 643914 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3692427 [patent_doc_number] => 05696397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Input protection circuit and method of fabricating semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/638766 [patent_app_country] => US [patent_app_date] => 1996-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 5769 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696397.pdf [firstpage_image] =>[orig_patent_app_number] => 638766 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3984961 [patent_doc_number] => 05949118 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Etching method for silicon substrates and semiconductor sensor' [patent_app_type] => 1 [patent_app_number] => 8/637128 [patent_app_country] => US [patent_app_date] => 1996-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 56 [patent_no_of_words] => 13763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949118.pdf [firstpage_image] =>[orig_patent_app_number] => 637128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3989583 [patent_doc_number] => 05959319 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Semiconductor memory device having word line conductors provided at lower level than memory cell capacitor and method of manufacturing same' [patent_app_type] => 1 [patent_app_number] => 8/631682 [patent_app_country] => US [patent_app_date] => 1996-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4080 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959319.pdf [firstpage_image] =>[orig_patent_app_number] => 631682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4031415 [patent_doc_number] => 05903022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Semiconductor memory device having improved word line arrangement in a memory cell array' [patent_app_type] => 1 [patent_app_number] => 8/630461 [patent_app_country] => US [patent_app_date] => 1996-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 44 [patent_no_of_words] => 8650 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903022.pdf [firstpage_image] =>[orig_patent_app_number] => 630461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3885444 [patent_doc_number] => 05798543 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Semiconductor element structure with stepped portion for formation of element patterns' [patent_app_type] => 1 [patent_app_number] => 8/625039 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 5258 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798543.pdf [firstpage_image] =>[orig_patent_app_number] => 625039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3811992 [patent_doc_number] => 05854495 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Preparation of nucleated silicon surfaces' [patent_app_type] => 1 [patent_app_number] => 8/535059 [patent_app_country] => US [patent_app_date] => 1996-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 3338 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854495.pdf [firstpage_image] =>[orig_patent_app_number] => 535059 [rel_patent_id] =>[rel_patent_doc_number] =>)